Francesco Conti

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University of Bologna ∙ ETH Zurich ∙ Universita Cagliari

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XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Network on RISC-V based IoT End Nodes

This work introduces lightweight extensions to the RISC-V ISA to boost t...
11/29/2020 ∙ by Angelo Garofalo, et al. ∙ 0 ∙ share

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Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors

The main design principles in computer architecture have recently shifte...
11/08/2020 ∙ by Sergi Abadal, et al. ∙ 0 ∙ share

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A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference

Low bit-width Quantized Neural Networks (QNNs) enable deployment of comp...
10/08/2020 ∙ by Gianmarco Ottavi, et al. ∙ 0 ∙ share

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DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs

The deployment of Deep Neural Networks (DNNs) on end-nodes at the extrem...
08/17/2020 ∙ by Alessio Burrello, et al. ∙ 13 ∙ share

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Memory-Latency-Accuracy Trade-offs for Continual Learning on a RISC-V Extreme-Edge Node

AI-powered edge devices currently lack the ability to adapt their embedd...
07/22/2020 ∙ by Leonardo Ravaglia, et al. ∙ 0 ∙ share

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Always-On 674uW @ 4GOP/s Error Resilient Binary Neural Networks with Aggressive SRAM Voltage Scaling on a 22nm IoT End-Node

Binary Neural Networks (BNNs) have been shown to be robust to random bit...
07/17/2020 ∙ by Alfio Di Mauro, et al. ∙ 0 ∙ share

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Enabling Mixed-Precision Quantized Neural Networks in Extreme-Edge Devices

The deployment of Quantized Neural Networks (QNN) on advanced microcontr...
07/15/2020 ∙ by Nazareno Bruschi, et al. ∙ 0 ∙ share

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Technical Report: NEMO DNN Quantization for Deployment Model

This technical report aims at defining a formal framework for Deep Neura...
04/13/2020 ∙ by Francesco Conti, et al. ∙ 7 ∙ share

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PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors

We present PULP-NN, an optimized computing library for a parallel ultra-...
08/29/2019 ∙ by Angelo Garofalo, et al. ∙ 0 ∙ share

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An Open Source and Open Hardware Deep Learning-powered Visual Navigation Engine for Autonomous Nano-UAVs

Nano-size unmanned aerial vehicles (UAVs), with few centimeters of diame...
05/10/2019 ∙ by Daniele Palossi, et al. ∙ 0 ∙ share

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Optimally Scheduling CNN Convolutions for Efficient Memory Access

Embedded inference engines for convolutional networks must be parsimonio...
02/04/2019 ∙ by Arthur Stoutchinin, et al. ∙ 0 ∙ share

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XNOR Neural Engine: a Hardware Accelerator IP for 21.6 fJ/op Binary Neural Network Inference

Binary Neural Networks (BNNs) are promising to deliver accuracy comparab...
07/09/2018 ∙ by Francesco Conti, et al. ∙ 10 ∙ share

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Ultra Low Power Deep-Learning-powered Autonomous Nano Drones

Flying in dynamic, urban, highly-populated environments represents an op...
05/04/2018 ∙ by Daniele Palossi, et al. ∙ 0 ∙ share

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NEURAghe: Exploiting CPU-FPGA Synergies for Efficient and Flexible CNN Inference Acceleration on Zynq SoCs

Deep convolutional neural networks (CNNs) obtain outstanding results in ...
12/04/2017 ∙ by Paolo Meloni, et al. ∙ 0 ∙ share

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Chipmunk: A Systolically Scalable 0.9 mm^2, 3.08 Gop/s/mW @ 1.2 mW Accelerator for Near-Sensor Recurrent Neural Network Inference

Recurrent neural networks (RNNs) are state-of-the-art in voice awareness...
11/15/2017 ∙ by Francesco Conti, et al. ∙ 0 ∙ share

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An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics

Near-sensor data analytics is a promising direction for IoT endpoints, a...
12/18/2016 ∙ by Francesco Conti, et al. ∙ 0 ∙ share

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