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Toward Location-aware In-body Terahertz Nanonetworks with Energy Harvesting
Nanoscale wireless networks are expected to revolutionize a variety of d...
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Dataflow-Architecture Co-Design for 2.5D DNN Accelerators using Wireless Network-on-Package
Deep neural network (DNN) models continue to grow in size and complexity...
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Workload Characterization of Programmable Metasurfaces
Metasurfaces are envisaged to play a key role in next-generation wireles...
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Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors
The main design principles in computer architecture have recently shifte...
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Localization in Terahertz-Operating Energy Harvesting Software-Defined Metamaterials
Software-Defined Metamaterials (SDMs) show a strong potential for advanc...
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Computing Graph Neural Networks: A Survey from Algorithms to Accelerators
Graph Neural Networks (GNNs) have exploded onto the machine learning sce...
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Radiation pattern prediction for Metasurfaces: A Neural Network based approach
As the current standardization for the 5G networks nears completion, wor...
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Understanding the Impact of On-chip Communication on DNN Accelerator Performance
Deep Neural Networks have flourished at an unprecedented pace in recent ...
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Survey on Terahertz Nanocommunication and Networking: A Top-Down Perspective
Recent developments in nanotechnology herald nanometer-sized devices exp...
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Data Conversion in Area-Constrained Applications: the Wireless Network-on-Chip Case
Network-on-Chip (NoC) is currently the paradigm of choice to interconnec...
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Engineer the Channel and Adapt to it: Enabling Wireless Intra-Chip Communication
Ubiquitous multicore processors nowadays rely on an integrated packet-sw...
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A General, Fault tolerant, Adaptive, Deadlock-free Routing Protocol for Network-on-chip
The paper presents a topology-agnostic greedy protocol for network-on-ch...
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Medium Access Control in Wireless Network-on-Chip: A Context Analysis
Wireless on-chip communication is a promising candidate to address the p...
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