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NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic
While there is a large body of research on efficient processing of deep ...
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A Tunable Robust Pruning Framework Through Dynamic Network Rewiring of DNNs
This paper presents a dynamic network rewiring (DNR) method to generate ...
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SynergicLearning: Neural Network-Based Feature Extraction for Highly-Accurate Hyperdimensional Learning
Machine learning models differ in terms of accuracy, computational/memor...
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Pre-defined Sparsity for Low-Complexity Convolutional Neural Networks
The high energy cost of processing deep convolutional neural networks im...
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Energy-Aware Scheduling of Task Graphs with Imprecise Computations and End-to-End Deadlines
Imprecise computations provide an avenue for scheduling algorithms devel...
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Modeling Processor Idle Times in MPSoC Platforms to Enable Integrated DPM, DVFS, and Task Scheduling Subject to a Hard Deadline
Energy efficiency is one of the most critical design criteria for modern...
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NullaNet: Training Deep Neural Networks for Reduced-Memory-Access Inference
Deep neural networks have been successfully deployed in a wide variety o...
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Deploying Customized Data Representation and Approximate Computing in Machine Learning Applications
Major advancements in building general-purpose and customized hardware h...
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A Hardware-Friendly Algorithm for Scalable Training and Deployment of Dimensionality Reduction Models on FPGA
With ever-increasing application of machine learning models in various d...
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FFT-Based Deep Learning Deployment in Embedded Systems
Deep learning has delivered its powerfulness in many application domains...
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High-Performance FPGA Implementation of Equivariant Adaptive Separation via Independence Algorithm for Independent Component Analysis
Independent Component Analysis (ICA) is a dimensionality reduction techn...
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