b'Nick Brown'

research

∙ 09/01/2023

Is RISC-V ready for HPC prime-time: Evaluating the 64-core Sophon SG2042 RISC-V CPU

The Sophon SG2042 is the world's first commodity 64-core RISC-V CPU for ...

0 Nick Brown, et al. ∙

research

∙ 08/25/2023

Fortran High-Level Synthesis: Reducing the barriers to accelerating HPC codes on FPGAs

In recent years the use of FPGAs to accelerate scientific applications h...

0 Gabriel Rodriguez-Canal, et al. ∙

research

∙ 04/30/2023

Experiences of running an HPC RISC-V testbed

Funded by the UK ExCALIBUR H&ES exascale programme, in early 2022 a RISC...

0 Nick Brown, et al. ∙

research

∙ 04/20/2023

Backporting RISC-V Vector assembly

Leveraging vectorisation, the ability for a CPU to apply operations to m...

0 Joseph K. L. Lee, et al. ∙

research

∙ 04/20/2023

Test-driving RISC-V Vector hardware for HPC

Whilst the RISC-V Vector extension (RVV) has been ratified, at the time ...

0 Joseph K. L. Lee, et al. ∙

research

∙ 04/19/2023

Morpheus unleashed: Fast cross-platform SpMV on emerging architectures

Sparse matrices and linear algebra are at the heart of scientific simula...

0 Christodoulos Stylianou, et al. ∙

research

∙ 01/18/2023

Task-based preemptive scheduling on FPGAs leveraging partial reconfiguration

FPGAs are an attractive type of accelerator for all-purpose HPC computin...

0 Gabriel Rodriguez-Canal, et al. ∙

research

∙ 12/28/2022

Web-based volunteer distributed computing for handling time-critical urgent workloads

Urgent computing workloads are time critical, unpredictable, and highly ...

0 Nick Brown, et al. ∙

research

∙ 12/28/2022

Fast and energy-efficient derivatives risk analysis: Streaming option Greeks on Xilinx and Intel FPGAs

Whilst FPGAs have enjoyed success in accelerating high-frequency financi...

0 Mark Klaisoongnoen, et al. ∙

research

∙ 12/28/2022

Exploring the Versal AI engines for accelerating stencil-based atmospheric advection simulation

AMD Xilinx's new Versal Adaptive Compute Acceleration Platform (ACAP) is...

0 Nick Brown, et al. ∙

research

∙ 09/02/2022

Performance of the Vipera framework for DSLs on micro-core architectures

Vipera provides a compiler and runtime framework for implementing dynami...

0 Maurice Jamieson, et al. ∙

research

∙ 08/26/2022

TensorFlow as a DSL for stencil-based computation on the Cerebras Wafer Scale Engine

The Cerebras Wafer Scale Engine (WSE) is an accelerator that combines hu...

0 Nick Brown, et al. ∙

research

∙ 08/26/2022

Programming abstractions for preemptive scheduling in FPGAs using partial reconfiguration

FPGAs are an attractive type of accelerator for all-purpose HPC computin...

0 Gabriel Rodriguez-Canal, et al. ∙

research

∙ 06/28/2022

Workflows to driving high-performance interactive supercomputing for urgent decision making

Interactive urgent computing is a small but growing user of supercomputi...

0 Nick Brown, et al. ∙

research

∙ 06/08/2022

Low-power option Greeks: Efficiency-driven market risk analysis using FPGAs

Quantitative finance is the use of mathematical models to analyse financ...

0 Mark Klaisoongnoen, et al. ∙

research

∙ 04/28/2022

Predicting batch queue job wait times for informed scheduling of urgent HPC workloads

There is increasing interest in the use of HPC machines for urgent workl...

0 Nick Brown, et al. ∙

research

∙ 11/10/2021

Utilising urgent computing to tackle the spread of mosquito-borne diseases

It is estimated that around 80% of the world's population live in areas ...

0 Nick Brown, et al. ∙

research

∙ 11/10/2021

Porting incompressible flow matrix assembly to FPGAs for accelerating HPC engineering simulations

Engineering is an important domain for supercomputing, with the Alya mod...

0 Nick Brown, et al. ∙

research

∙ 07/28/2021

Accelerating advection for atmospheric modelling on Xilinx and Intel FPGAs

Reconfigurable architectures, such as FPGAs, enable the execution of cod...

0 Nick Brown, et al. ∙

research

∙ 07/28/2021

Optimisation of an FPGA Credit Default Swap engine by embracing dataflow techniques

Quantitative finance is the use of mathematical models to analyse financ...

0 Nick Brown, et al. ∙

research

∙ 04/10/2021

Application specific dataflow machine construction for programming FPGAs via Lucent

Field Programmable Gate Arrays (FPGAs) have the potential to accelerate ...

0 Nick Brown, et al. ∙

research

∙ 02/03/2021

Compact Native Code Generation for Dynamic Languages on Micro-core Architectures

Micro-core architectures combine many simple, low memory, low power-cons...

0 Maurice Jamieson, et al. ∙

research

∙ 11/10/2020

Benchmarking micro-core architectures for detecting disasters at the edge

Leveraging real-time data to detect disasters such as wildfires, extreme...

0 Maurice Jamieson, et al. ∙

research

∙ 11/10/2020

Exploring the acceleration of Nekbone on reconfigurable architectures

Hardware technological advances are struggling to match scientific ambit...

0 Nick Brown, et al. ∙

research

∙ 10/28/2020

ePython: An implementation of Python for the many-core Epiphany coprocessor

The Epiphany is a many-core, low power, low on-chip memory architecture ...

0 Nick Brown, et al. ∙

research

∙ 10/28/2020

Porting the microphysics model CASIM to GPU and KNL Cray machines

CASIM is a microphysics scheme which calculates the interaction between ...

0 Nick Brown, et al. ∙

research

∙ 10/27/2020

Extended abstract: Type oriented programming for task based parallelism

Writing parallel codes is difficult and exhibits a fundamental trade-off...

0 Nick Brown, et al. ∙

research

∙ 10/27/2020

A comparison of techniques for solving the Poisson equation in CFD

CFD is a ubiquitous technique central to much of computational simulatio...

0 Nick Brown, et al. ∙

research

∙ 10/27/2020

In-situ data analytics for highly scalable cloud modelling on Cray machines

MONC is a highly scalable modelling tool for the investigation of atmosp...

0 Nick Brown, et al. ∙

research

∙ 10/26/2020

Leveraging MPI RMA to optimise halo-swapping communications in MONC on Cray machines

Remote Memory Access (RMA), also known as single sided communications, p...

0 Nick Brown, et al. ∙

research

∙ 10/26/2020

Driving asynchronous distributed tasks with events

Open-source matters, not just to the current cohort of HPC users but als...

0 Nick Brown, et al. ∙

research

∙ 10/23/2020

A Bespoke Workflow Management System for Data-Driven Urgent HPC

In this paper we present a workflow management system which permits the ...

0 Gordon P. S. Gibb, et al. ∙

research

∙ 10/17/2020

iPregel: Vertex-centric programmability vs memory efficiency and performance, why choose?

The vertex-centric programming model, designed to improve the programmab...

0 Ludovic A. R. Capelli, et al. ∙

research

∙ 10/17/2020

Using machine learning to reduce ensembles of geological models for oil and gas exploration

Exploration using borehole drilling is a key activity in determining the...

0 Anna Roubíčková, et al. ∙

research

∙ 10/17/2020

The role of interactive super-computing in using HPC for urgent decision making

Technological advances are creating exciting new opportunities that have...

0 Nick Brown, et al. ∙

research

∙ 10/04/2020

High level programming abstractions for leveraging hierarchical memories with micro-core architectures

Micro-core architectures combine many low memory, low power computing co...

0 Maurice Jamieson, et al. ∙

research

∙ 10/04/2020

It's all about data movement: Optimising FPGA data access to boost performance

The use of reconfigurable computing, and FPGAs in particular, to acceler...

0 Nick Brown, et al. ∙

research

∙ 10/04/2020

Exploring the acceleration of the Met Office NERC Cloud model using FPGAs

The use of Field Programmable Gate Arrays (FPGAs) to accelerate computat...

0 Nick Brown, et al. ∙

research

∙ 10/04/2020

The Technologies Required for Fusing HPC and Real-Time Data to Support Urgent Computing

The use of High Performance Computing (HPC) to compliment urgent decisio...

0 Gordon Gibb, et al. ∙

research

∙ 10/04/2020

iPregel: Strategies to Deal with an Extreme Form of Irregularity in Vertex-Centric Graph Processing

Over the last decade, the vertex-centric programming model has attracted...

0 Ludovic Anthony Richard Capelli, et al. ∙

research

∙ 10/01/2020

Supercomputing with MPI meets the Common Workflow Language standards: an experience report

Use of standards-based workflows is still somewhat unusual by high-perfo...

0 Rupert W. Nash, et al. ∙

research

∙ 10/01/2020

Weighing up the new kid on the block: Impressions of using Vitis for HPC software development

The use of reconfigurable computing, and FPGAs in particular, has strong...

0 Nick Brown, et al. ∙

research

∙ 10/01/2020

Modelling the earth's geomagnetic environment on Cray machines using PETSc and SLEPc

The British Geological Survey's global geomagnetic model, Model of the E...

0 Nick Brown, et al. ∙

research

∙ 09/27/2020

A directive based hybrid Met Office NERC Cloud model

Large Eddy Simulation is a critical modelling tool for the investigation...

0 Nick Brown, et al. ∙

research

∙ 09/27/2020

A highly scalable Met Office NERC Cloud model

Large Eddy Simulation is a critical modelling tool for scientists invest...

0 Nick Brown, et al. ∙

research

∙ 09/27/2020

A Type-Oriented Graph500 Benchmark

Data intensive workloads have become a popular use of HPC in recent year...

0 Nick Brown, et al. ∙

research

∙ 09/26/2020

A highly scalable approach to solving linear systems using two-stage multisplitting

Iterative methods for solving large sparse systems of linear equations a...

0 Nick Brown, et al. ∙

research

∙ 09/26/2020

Applying Type Oriented Programming to the PGAS Memory Model

The Partitioned Global Address Space memory model has been popularised b...

0 Nick Brown, et al. ∙

research

∙ 09/24/2020

Investigating Applications on the A64FX

The A64FX processor from Fujitsu, being designed for computational simul...

0 Adrian Jackson, et al. ∙

Nick Brown

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