research
∙
08/04/2023
Automatic multi-dimensional pipelining for high-level synthesis of dataflow accelerators
In recent years, there has been a surging demand for edge computing of i...
share
research
∙
02/27/2021
HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description
The emergence of machine learning, image and audio processing on edge de...
research
∙
12/16/2019
