Low Power Inference for On-Device Visual Recognition with a Quantization-Friendly Solution

03/12/2019
by   Chen Feng, et al.
6

The IEEE Low-Power Image Recognition Challenge (LPIRC) is an annual competition started in 2015 that encourages joint hardware and software solutions for computer vision systems with low latency and power. Track 1 of the competition in 2018 focused on the innovation of software solutions with fixed inference engine and hardware. This decision allows participants to submit models online and not worry about building and bringing custom hardware on-site, which attracted a historically large number of submissions. Among the diverse solutions, the winning solution proposed a quantization-friendly framework for MobileNets that achieves an accuracy of 72.67 dataset with an average latency of 27ms on a single CPU core of Google Pixel2 phone, which is superior to the best real-time MobileNet models at the time.

READ FULL TEXT

page 1

page 2

page 3

page 4

research
10/03/2018

2018 Low-Power Image Recognition Challenge

The Low-Power Image Recognition Challenge (LPIRC, https://rebootingcompu...
research
04/15/2019

Low-Power Computer Vision: Status, Challenges, Opportunities

Computer vision has achieved impressive progress in recent years. Meanwh...
research
06/08/2023

Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference

The need to execute Deep Neural Networks (DNNs) at low latency and low p...
research
03/15/2023

SpaceEvo: Hardware-Friendly Search Space Design for Efficient INT8 Inference

The combination of Neural Architecture Search (NAS) and quantization has...
research
11/27/2018

Efficient non-uniform quantizer for quantized neural network targeting reconfigurable hardware

Convolutional Neural Networks (CNN) has become more popular choice for v...
research
09/03/2022

Low-Power Hardware-Based Deep-Learning Diagnostics Support Case Study

Deep learning research has generated widespread interest leading to emer...
research
02/22/2021

BayesPerf: Minimizing Performance Monitoring Errors Using Bayesian Statistics

Hardware performance counters (HPCs) that measure low-level architectura...

Please sign up or login with your details

Forgot password? Click here to reset