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08/10/2023
RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model
Inspired by the recent success of large language models (LLMs) like Chat...
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12/22/2022
FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs
Multi-die FPGAs are widely adopted to deploy large hardware accelerators...
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06/07/2022
Intelligent Circuit Design and Implementation with Machine Learning
The stagnation of EDA technologies roots from insufficient knowledge reu...
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03/30/2022
Towards Collaborative Intelligence: Routability Estimation based on Decentralized Private Data
Applying machine learning (ML) in design flow is a popular trend in EDA ...
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03/20/2022
The Dark Side: Security Concerns in Machine Learning for EDA
The growing IC complexity has led to a compelling need for design effici...
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12/03/2020
Automatic Routability Predictor Development Using Neural Architecture Search
The rise of machine learning technology inspires a boom of its applicati...
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11/27/2020
Net2: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation
Net length is a key proxy metric for optimizing timing and power across ...
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11/26/2020
PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network
IR drop is a fundamental constraint required by almost all chip designs....
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11/26/2020
FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning
Design flow parameters are of utmost importance to chip design quality a...
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11/26/2020
