Thomas Bourgeat | DeepAI

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research

∙ 06/26/2023

Citadel: Enclaves with Strong Microarchitectural Isolation and Secure Shared Memory on a Speculative Out-of-Order Processor

We present Citadel, to our knowledge, the first enclave platform with st...

0 Jules Drean, et al. ∙

research

∙ 04/01/2021

A Multipurpose Formal RISC-V Specification

RISC-V is a relatively new, open instruction set architecture with a mat...

0 Thomas Bourgeat, et al. ∙

research

∙ 12/24/2018

MI6: Secure Enclaves in a Speculative Out-of-Order Processor

Recent attacks have broken process isolation by exploiting microarchitec...

0 Thomas Bourgeat, et al. ∙