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05/09/2023
Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra
Sparse linear algebra is crucial in many application domains, but challe...
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11/16/2020
Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra
Sparse-dense linear algebra is crucial in many domains, but challenging ...
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09/11/2020
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication
On-chip communication infrastructure is a central component of modern sy...
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08/14/2020
Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing
Data-parallel problems demand ever growing floating-point (FP) operation...
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07/03/2020
FPnew: An Open-Source Multi-Format Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing
The slowdown of Moore's law and the power wall necessitates a shift towa...
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02/24/2020
Snitch: A 10 kGE Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads
Data-parallel applications, such as data analytics, machine learning, an...
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11/19/2019
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores
Single-issue processor cores are very energy efficient but suffer from t...
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06/02/2019
Ara: A 1 GHz+ Scalable and Energy-Efficient RISC-V Vector Processor with Multi-Precision Floating Point Support in 22 nm FD-SOI
In this paper, we present Ara, a 64-bit vector processor based on the ve...
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04/10/2019