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08/18/2021
Timed Automata Robustness Analysis via Model Checking
Timed automata (TA) have been widely adopted as a suitable formalism to ...
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03/22/2020
Kontrol Edilebilir ptSTL Formulu Sentezi – Synthesis of Controllable ptSTL Formulas
In this work, we develop an approach to anomaly detection and prevention...
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04/16/2019
An Efficient Formula Synthesis Method with Past Signal Temporal Logic
In this work, we propose a novel method to find temporal properties that...
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04/07/2019
Cause Mining and Controller Synthesis with STL
Formal control of cyber-physical systems allows for synthesis of control...
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09/12/2014