ViPIOS - VIenna Parallel Input Output System: Language, Compiler and Advanced Data Structure Support for Parallel I/O Operations

08/03/2018
by   Erich Schikuta, et al.
0

For an increasing number of data intensive scientific applications, parallel I/O concepts are a major performance issue. Tackling this issue, we develop an input/output system designed for highly efficient, scalable and conveniently usable parallel I/O on distributed memory systems. The main focus of this research is the parallel I/O runtime system support provided for software-generated programs produced by parallelizing compilers in the context of High Performance FORTRAN efforts. Specifically, our design aims for the Vienna Fortran Compilation System. In our research project we investigate the I/O problem from a runtime system support perspective. We focus on the design of an advanced parallel I/O support, called ViPIOS (VIenna Parallel I/O System), to be targeted by language compilers supporting the same programming model like High Performance Fortran (HPF). The ViPIOS design is partly influenced by the concepts of parallel database technology. At the beginning of the project we developed a formal model, which forms a theoretical framework on which the ViPIOS design is based. This model describes the mapping of the problem specific data space starting from the application program data structures down to the physical layout on disk across several intermediate representation levels. Based on this formal model we designed and developed an I/O runtime system, ViPIOS, which provides support for several issues, as - parallel access to files for read/write operations, - optimization of data-layout on disks, - redistribution of data stored on disks, - communication of out-of-core (OOC) data, and - many optimizations including data prefetching from disks based on the access pattern knowledge extracted from the program by the compiler or provided by a user specification.

READ FULL TEXT

page 1

page 2

page 3

page 4

research
03/14/2022

Automatic Compiler-Based Data Structure Generation

Optimizing compilers are mainly equipped to optimize control flow. The o...
research
09/21/2022

UPIR: Toward the Design of Unified Parallel Intermediate Representation for Parallel Programming Models

The complexity of heterogeneous computing architectures, as well as the ...
research
10/28/2019

Active Access: A Mechanism for High-Performance Distributed Data-Centric Computations

Remote memory access (RMA) is an emerging high-performance programming m...
research
03/24/2023

Compiler Optimization for Irregular Memory Access Patterns in PGAS Programs

Irregular memory access patterns pose performance and user productivity ...
research
07/15/2021

Improving I/O Performance for Exascale Applications through Online Data Layout Reorganization

The applications being developed within the U.S. Exascale Computing Proj...
research
03/25/2023

GPU-accelerated Matrix Cover Algorithm for Multiple Patterning Layout Decomposition

Multiple patterning lithography (MPL) is regarded as one of the most pro...
research
05/24/2019

Compiler Design for Legal Document Translation in Digital Government

One of the main purposes of a computer is automation. In fact, automatio...

Please sign up or login with your details

Forgot password? Click here to reset