Vectorization of Multibyte Floating Point Data Formats

01/26/2016
by   Andrew Anderson, et al.
0

We propose a scheme for reduced-precision representation of floating point data on a continuum between IEEE-754 floating point types. Our scheme enables the use of lower precision formats for a reduction in storage space requirements and data transfer volume. We describe how our scheme can be accelerated using existing hardware vector units on a general-purpose processor (GPP). Exploiting native vector hardware allows us to support reduced precision floating point with low overhead. We demonstrate that supporting reduced precision in the compiler as opposed to using a library approach can yield a low overhead solution for GPPs.

READ FULL TEXT
research
02/15/2016

Customizable Precision of Floating-Point Arithmetic with Bitslice Vector Types

Customizing the precision of data can provide attractive trade-offs betw...
research
03/29/2006

Implementation of float-float operators on graphics hardware

The Graphic Processing Unit (GPU) has evolved into a powerful and flexib...
research
06/01/2016

Profile-Driven Automated Mixed Precision

We present a scheme to automatically set the precision of floating point...
research
06/20/2017

Improving text classification with vectors of reduced precision

This paper presents the analysis of the impact of a floating-point numbe...
research
07/26/2022

Productivity meets Performance: Julia on A64FX

The Fujitsu A64FX ARM-based processor is used in supercomputers such as ...
research
08/04/2021

BEANNA: A Binary-Enabled Architecture for Neural Network Acceleration

Modern hardware design trends have shifted towards specialized hardware ...
research
05/11/2020

Computationally Inequivalent Summations and Their Parenthetic Forms

Floating-point addition on a finite-precision machine is not associative...

Please sign up or login with your details

Forgot password? Click here to reset