Self-Learning Tuning for Post-Silicon Validation

11/17/2021

∙

by   Peter Domanski, et al.

∙

0

∙

share

Increasing complexity of modern chips makes design validation more difficult. Existing approaches are not able anymore to cope with the complexity of tasks such as robust performance tuning in post-silicon validation. Therefore, we propose a novel approach based on learn-to-optimize and reinforcement learning in order to solve complex and mixed-type tuning tasks in a efficient and robust way.