The availability of ever-increasing quantum resources in contemporary quantum computers promises disruptive applications in drug design , chemistry , material sciences  and cryptography . However, the computation of quantum algorithms facilitating advances in these fields is limited by large error rates and short decoherence times in current quantum computers [34, 6]. Furthermore, in most quantum computing technologies such as ion traps [20, 22, 36, 33], superconducting circuits [1, 19, 39], Rydberg atoms  and NV centers  only a subset of qubit-qubit interactions defined by the topology of a quantum computer are supported at a time. Quantum algorithms can be made compliant with a quantum computer topology through quantum circuit mapping. Quantum circuit mapping, however, incurs further errors during quantum algorithm computations since additional operations, e.g. swap gates, need to be inserted into the computation [12, 17]. It is therefore crucial to reduce the overhead incurred by quantum circuit mapping to extend the set of feasible quantum algorithm computations in current noisy and intermediate-scale quantum computing technology .
Quantum computing architectures based on Rydberg atoms are characterized by long decoherence times, high-fidelity quantum gates , multi-qubit interactions  and the capability to dynamically change their topology during the computation of a quantum algorithm [31, 2, 14]. They are therefore a promising candidate for near-term quantum computing and physical realizations are currently investigated by research groups  and startups such as QUERA  and Pasqal . However, the topology changes supported by quantum computers based on Rydberg atoms have not been explored for quantum circuit mapping, yet.
Topology changes, which do not manipulate the quantum state per se
, can have lower error rates than swap gates. Moreover, one topology change can have the same effect as multiple swap gates, potentially reducing the circuit’s depth and increasing the probability to complete the circuit within the limit given by the decoherence time. The computational reach of quantum technologies supporting topology changes, such as Rydberg atoms, may therefore be extended.
In this work, we develop an optimal method that exploits the topology changes available in Rydberg atom quantum computing technologies for quantum circuit mapping by:
developing a novel formal model for one-dimensional topology changes and extending it with a given formal model for swap gate insertion.
evaluating the developed quantum circuit mapping method on intermediate-scale quantum circuits.
characterizing technology parameters that enable an improved quantum circuit mapping through topology changes supported by near-term Rydberg architectures.
The remainder of this work is structured as follows. In section II the principles of quantum computing are introduced. Section III introduces quantum architectures based on Rydberg atoms and topology changes supported by near-term devices. Section IV introduces quantum circuit mapping and reviews related work. Section V introduces a novel formal model that considers topology changes supported by the Rydberg atoms platform and discusses how to use this model for conventional quantum circuit mapping using swap gates. Section VI shows the improvement in quantum circuit depth and fidelity by considering such topology changes for different technology parameters on intermediate-scale quantum circuits. Section VII concludes the work.
Ii Quantum Computing
A quantum computer performs computations on the quantum state of -qubits as specified by external control. The basic unit of information in quantum computing is the qubit, which describes a two-level quantum system . The quantum state of one qubit can be described as
where are the computational basis states with complex probability amplitudes whose magnitudes must sum up to one. If more than one complex probability amplitude is larger than zero, the state is said to be in a superposition. The measurement of a state yields the result with probability . If the result was measured, the state typically collapses to the computational basis state . Quantum gates describe quantum state transformations by defining changes to the complex probability amplitudes of the state. A quantum computer typically supports a subset of quantum gates, e.g. IBM’s quantum computers currently support quantum gates for specific single-qubit rotations and the controlled-not (CX) two-qubit quantum gate. Furthermore, a quantum computer may only support multi-qubit gates between specific qubits [1, 22, 9]. Such qubit-qubit interaction constraints are described by the topology graph of a quantum computer.
Figure 1 depicts the steps required to perform a quantum algorithm on a quantum computer. A quantum algorithm describes how to transform a quantum state such that the solution to a computational problem is yielded. Before executing a quantum algorithm on a target quantum computer, the algorithmic description must first be compiled to a quantum circuit that contains supported quantum gates and is then mapped to the topology of the target quantum computer. We call the latter compilation step quantum circuit mapping and the former quantum algorithm synthesis. This paper focuses on the mapping step.
Executing a quantum algorithm poses several requirements on the target quantum computer. The target quantum computer must have at least as many qubits as required by the quantum algorithm. Furthermore, the decoherence time of the quantum computer must be much larger than the minimum time a quantum algorithm computation requires on the quantum computer. A quantum algorithm also poses requirements on the physical error rates of the employed quantum computer [6, 7].
Iii Quantum Computing Based on Rydberg Atoms
Quantum architectures based on Rydberg atoms consist of an array of individually trapped neutral atoms. The trapping is achieved by optical tweezers that allow for the deterministic loading of the array by physically moving atoms [31, 2, 14]. Single-qubit gates are achieved by individual optical addressing of the atoms, while two-qubit gates are realized by exciting the atoms into a Rydberg state, where Van der Waals interaction is enhanced such that it mediates a strong interaction between neighboring atoms [21, 15, 44, 23, 16, 25].
While in principle one can envisage arbitrary movement of the atoms during a quantum computation, a major challenge is to avoid errors due to the dephasing of the qubit and the coupling of the qubit to motional degrees of freedom. Therefore, the movement of atoms during the quantum computation is expected to be restricted in near-term architectures based on Rydberg atoms. Restricting the movement of the atoms along a row of the two dimensional array with fixed ordering of the qubits can avoid such errors and is currently experimentally implemented in e.g.. We call such movements one-dimensional displacements and model them through changes to the topology graph of the quantum computer.
A topology graph represents the qubits and possible qubit-qubit interactions in a quantum computer. The topology graph contains one vertex for each qubit in the quantum computer and one edge , if qubit and qubit in the quantum computer can interact with each other, i.e. participate in a multi-qubit gate. A topology graph change is a removal or an addition of at least one edge to the graph.
In this work, one-dimensional topology displacements are considered. Figure 2 shows a grid where the rows are shifted relatively to each other in three different ways (a, b and c). In topology change a, the qubits in the first row are displaced to the right side. The second topology change (b) displaces qubit 0 and qubit 1 to the left side by one and keeps qubit 2 in position. It would also be possible to displace qubit 2 to the right side in the same topology change. The topology change c is not permitted since the relative position of qubit 0 and qubit 1 in the first row are swapped.
Depending on the physical realization of a quantum computer, a subset of topology graph changes are supported. Quantum computing technologies such as superconducting qubits and NV centers do not support deliberate changes in qubit-qubit interaction during the computation of a quantum algorithm and can therefore be represented by one static topology graph for quantum circuit mapping purposes [28, 1]. In contrast, quantum computing technologies based on photons, ion traps and Rydberg atoms can change the qubit-qubit interactions by physically moving qubits [47, 3] or changing other operational parameters . In photonic quantum computers the qubit arrangement, and thus the qubit-qubit interaction, can be changed arbitrarily by placing mirrors  or waveguides . In ion trap quantum computer realizations, electromagnetic fields can be applied to support arbitrary topology changes . Other ion trap quantum computers allow to physically move their ions depending on the placement and operation of electrodes in the quantum computer .
Iv Quantum Circuit Mapping
Quantum circuit mapping assigns each computation in a quantum circuit a location on a quantum computer to a set of qubits and a time step [41, 48]. A computation may be a quantum gate, measurement or other operation and requires the specification of at least one qubit. A location may be one or multiple qubits on a quantum computer. The primary objective of quantum circuit mapping is to adapt a quantum circuit to the topology of a quantum computer such that the qubit-qubit interaction requirements of each computation are satisfied, i.e. all multi-qubit gates are assigned to multiple vertices that are connected according to . If two successive computations were specified on the same qubits in the quantum circuit but are assigned to different vertices during quantum circuit mapping, the mapping procedure must use operations such as swap gates  or quantum teleportation .
Figure 1 shows the topology graph for a six-qubit quantum computer and a six-qubit quantum circuit containing six two-qubit gates. Consider the two-qubit quantum gates CX(1, 3) and CX(2, 4) between qubit pair and qubit pair . They can not be performed directly by the quantum computer since its topology does not support these interactions. However, the quantum circuit in figure 1 can be mapped by swapping the qubit state of with before and after computing the considered two-qubit quantum gates.
Besides the adaptation to the topology of a quantum computer, quantum circuit mapping may be performed subject to secondary objectives that typically are expected to reduce the incurred error during a quantum algorithm computation. Such secondary objectives are typically the minimization of operations inserted by quantum circuit mapping and the minimization of the resulting quantum circuit depth [41, 49, 46, 24, 48, 12]. However, further objectives have been proposed such as reduction of concurrent operations that incur crosstalk errors , the maximization of circuit fidelity [43, 42] or mapping operations to qubits that have demonstrated lower error rates during calibration protocols [43, 30].
Heuristic [49, 24, 43, 30, 27, 12] and optimal [41, 46, 48] algorithms for quantum circuit mapping have been proposed. Prior quantum circuit mapping approaches relying on swap gate insertions consider topology graphs that remain constant during the computation of the quantum circuit [41, 49, 46, 24, 27, 43, 30]. Quantum circuit mapping methods specifically for ion trap quantum computers consider arbitrary qubit-qubit interactions through a sequence of topology graph changes [47, 26]. However, these works do not consider swap gate insertions alongside topology changes. In this work, swap gates and topology graph changes are both considered for quantum circuit mapping.
V Quantum Circuit Mapping for Near-Term Quantum Architectures based on Rydberg Atoms
In this section we describe how a quantum circuit mapping can be computed by constructing and solving an satisfiability modulo theories (SMT) model . Model is the union of a model that describes valid topology changes in a near-term Rydberg architecture and a model that describes the effect of swap gate insertions on the quantum circuit.
Figure 3 shows the steps of the developed quantum circuit mapping method for a quantum circuit and a topology graph . First, the topology graph is extended to yield a graph that includes edges for all qubit-qubit interactions that can be supported by valid topology graph changes. The model is then constructed from the input quantum circuit , topology graph and the maximum quantum circuit depth . A solver then tries to determine valid assignments to subject to further optimization objectives such as the minimization of the quantum circuit depth or the maximization of the circuit fidelity.
If the solver returns a valid assignment to , then the obtained quantum circuit mapping is optimal with respect to the chosen objective function. Otherwise, model is modified by increasing the maximum quantum circuit depth while retaining the original quantum circuit and extended topology graph . This process is repeated until a valid assignment to , i.e. a quantum circuit mapping, is found. Optimality is guaranteed with this approach, if the value of the employed objective function becomes worse for an increasing quantum circuit depth. Otherwise, a sufficiently large initial maximum quantum circuit depth must be chosen that allows arbitrary qubit permutations and topology changes for each computation in the quantum circuit .
The following sections assume that is the set of qubits accessible in a quantum computer, are the qubits in a quantum circuit and is the maximum quantum circuit depth (or: last time step) considered for quantum circuit mapping. is the number of rows (columns) in the topology and also a function that maps a qubit to its corresponding row (column) in . Constraints that define the domain of a variable have been omitted.
V-a Topology Graph Extension
The first step is to construct the extended topology graph according to topology displacements supported by near-term Rydberg atom architectures (see section III). We assume the Rydberg platform to initially have a topology where qubits are connected to their nearest neighbors and arranged in a grid. We model arbitrary displacements of qubits in one row along the x-axis of the grid such that the order of the qubits in the row is maintained. The resulting extended topology graph is shown in figure 4. Since the qubits can be displaced along the x-axis of the grid, an arbitrary qubit of row can interact with an arbitrary qubit of a neighboring row . Since the relative position of qubits in the same row may not change, qubits in the same row can only interact if , where is the edge set of the original topology graph . Therefore, the edge set of is defined by
The topology graph extension introduces edges to for a grid.
V-B Modeling One-Dimensional Topology Displacements
The next step in the developed method is to define how a topology graph can change from one time step to another and which edges in are available for computation in a specific topology displacement. Given the extended topology graph and the maximum considered quantum circuit depth the model of one-dimensional topology displacements (see section III) contains the following variables:
— represents the displacement of a qubit at time , where a value of 0 indicates no displacement, a positive value indicates a displacement to the right side and a negative value indicates a displacement to the left side.
— indicates whether an edge in the extended topology graph is available for a multi-qubit computation.
One-dimensional topology displacements are characterized by a fixed order of qubits in the same row for all time steps . Each qubit is assigned a displacement that is constrained by:
where and .
The displacements of qubit and qubit support an edge for a multi-qubit quantum gate computation at time if the displacements are equal
for qubits that are in the same row and
for qubits that are in neighboring rows.
A topology displacement may require a runtime of time steps. A mismatch in displacement on a qubit between time step and therefore implies that no other operation may be computed on in . The runtime is a user-specified input to the optimization problem based on the experimentally measured duration of the displacement.
V-C Formal Swap Gate Insertion Model
Solving a swap gate insertion model yields a quantum circuit mapping that inserts swap gates to adapt a quantum circuit to a topology graph . A swap gate insertion model defines an assignment of qubits in a quantum circuit to the qubits of a quantum computer topology for each considered time step. Furthermore, each computation is assigned a location for each time step.
In general, a swap insertion model constraints the assignment to the following variables:
— represents the assignment of a qubit in the input quantum circuit to a qubit in the quantum computer.
— indicates the location of a computation in the input quantum circuit .
— indicates the time step of a computation in the input quantum circuit .
under the following conditions:
Each computation is assigned a location that satisfies the qubit requirement of and a time that satisfies the computation order defined in .
Each is assigned at most one , i.e. the assignment is unique at any fixed time step for all qubit .
If a computation is assigned a location at time , the qubits specified by must have been assigned to , i.e .
The assignment may only change to if there exists an edge in the topology graph .
For each change in qubit assignment () a swap gate is inserted into the quantum circuit . Furthermore, operations may have individual runtimes that must be considered, i.e. a qubit is occupied with at most one operation in any time step .
Combining a swap insertion model with a model for topology changes requires two more constraints:
A swap or multi-qubit computation may only act on pairs of qubits in a certain time step if indicates that the edge between and is available in the topology at time .
Either a single-qubit gate, a multi-qubit gate, a topology displacement or a swap gate may act on a qubit at the same time step .
Several formal swap gate insertion models were proposed in the state of the art [42, 46, 48]. The swap insertion model described in this section is generic and compatible with these approaches. In our experiments reported in section VI we will be using the specific model from .
V-D Optimization Objectives
Optimization objectives such as minimizing the number of inserted swap gates, maximizing the fidelity of the resulting quantum circuit or minimizing the resulting quantum circuit depth are crucial for obtaining a quantum circuit mapping that incurs low errors on the target quantum computer.
In model , the depth minimization and quantum circuit fidelity can be defined as:
minimize quantum circuit depth: .
maximize quantum circuit fidelity:
where is the fidelity of a computation , is the set of swap gates, is the fidelity of a swap gate , is the set of one-dimensional topology displacements and is the fidelity of a displacement .
Example — One-dimensional topology displacements improve quantum circuit mapping
We will now demonstrate model on a quantum circuit that can be mapped with less overhead using one-dimensional topology displacements than using only swap gate insertions. Consider the six-qubit quantum circuit and the topology grid in figure 1. The quantum circuit consists of six two-qubit gates out of which two quantum gates CX(1, 3) and CX(4, 2) can not be computed on the specified topology graph directly. Through the developed model , a quantum circuit mapping based on one-dimensional topology displacements or swap gate insertion can be computed.
Let the runtime of the swap gate and the topology displacement be and the runtime of all other operations be . The two two-qubit gates to the left of the dashed line in figure 1 can be computed directly in the first time step of the quantum computation.
In the case of a quantum circuit mapping using swap gate insertions, the quantum gates CX(1, 3) and CX(4, 2) can be computed in time step by inserting either set of swap gates or . If is computed until time step , the remaining two-qubit gates can not be computed directly and would require another insertion of swap . This would lead to a resulting quantum circuit depth of . If is computed until time step , CX(0, 1) requires another swap. In this case, the resulting quantum circuit depth is again .
A quantum circuit mapping based on topology displacements can displace qubits by (). This displacement allows interactions between qubits and qubits , i.e. CX(1, 3) and CX(4, 2) are assigned the newly available qubit-qubit interactions as locations and time steps . The remaining two-qubit gates can be computed in the next time step, i.e. the resulting quantum circuit has depth . This example shows that even for small-scale quantum circuits, their structure can be exploited through one-dimensional topology displacements to reduce the depth of the mapped quantum circuit.
In this evaluation, we investigated the improvement in quantum circuit depth and quantum circuit fidelity when introducing one-dimensional topology displacements to quantum circuit mapping in addition to swap gates. The improvement was evaluated for different technology parameters such as the fidelity of swap gates, and the runtime of topology displacements and swap gates.
We evaluated the developed quantum circuit mapping method on quantum circuits with up to 15 qubits and a maximum depth of . The evaluated quantum circuits compute arithmetic functions , Bernstein-Vazirani (BV) 
or the quantum Fourier transformation (QFT). In addition, quantum circuits with multiple layers of two-qubit CX gates between random pairs of qubits were generated and evaluated. For each evaluated quantum circuit with qubits , the topology graph was chosen to be a grid where is the number of rows and is the number of columns such that and minimal.
Vi-a Quantum Circuit Depth
Each quantum circuit was successively evaluated with a swap gate and topology displacement runtime ranging from one to four time steps. Figure 6 shows the reduction in quantum circuit depth when using topology displacements in conjunction with swap gates for quantum circuit mapping.
If the runtime of swap gates and topology displacements is equal, the average reduction in quantum circuit depth ranges from to depending on the actual runtime. If the swap runtime is smaller than the topology displacement runtime, the mapping procedure will typically fall back to inserting swap gates instead of using topology displacements unless one topology displacement can solve more qubit-qubit interaction requirements than one swap gate at a particular time step of the quantum circuit computation. For the evaluated quantum circuits, this is never the case if the swap runtime equals one time step and the topology displacement runtime is larger than one time step. However, if the swap runtime is two time steps and the topology displacement runtime is four time steps, a quantum circuit depth reduction of on average can be observed.
In contrast, if the swap runtime is larger than the topology displacement runtime, an average quantum circuit depth reduction of up to can be observed. The exact quantum circuit depth improvement depends on the ratio between the swap gate runtime and topology displacement runtime. If this ratio is the reduction in quantum circuit depth is on average.
As evident from the diagonal entries of the matrix in figure 6, is not the only factor that determines the quantum circuit depth reduction. In the diagonal, the ratio of the two runtimes is always , i.e. take the same number of time steps. However, the depth reduction ranges from to . This difference stems from the quantum circuit structure, i.e. the number and position of single- and multi-qubit gates.
The impact of the circuit structure is also evident in figure 7. The developed method does not reduce the depth of QFT quantum circuits at any evaluated combination of swap gate runtime and topology displacement runtime. However, for arithmetic quantum circuits, the quantum circuit depth reduction is up to . If is , the quantum circuit depth reduction is up to . With decreasing , the structure of the quantum circuit becomes insignificant for the reduction of quantum circuit depth: if the swap gate is twice as fast as the topology displacement, the maximum quantum circuit depth reduction is roughly . At even faster swap gates, the topology displacements do not have a tangible impact on the quantum circuit depth reduction.
The fidelity was set to for topology displacements since we expect these restricted atom movements through optical tweezers to not have an impact on the quantum state of the qubits. The evaluated quantum circuits were then investigated with a swap gate fidelity of . Figure 8 shows the improvement in fidelity when using one-dimensional topology displacements in addition to noisy swap gates compared to a quantum circuit mapping with noisy swap gates only. Using topology displacements in addition to swap gates lead to a maximal fidelity improvement of at a swap gate fidelity of . However, for every evaluated swap gate fidelity there existed quantum circuits whose fidelity did not improve, i.e. no swap gate could be replaced by a topology displacement. At the largest evaluated swap gate fidelity , the fidelity improved by on average. For the lowest evaluated swap gate fidelity , the quantum circuit fidelity improved by on average. These results show that depending on the exact technology parameters, one-dimensional topology displacements can incur a significant improvement in fidelity or barely have an effect on the fidelity of the quantum circuit computation.
In this work a novel optimal quantum circuit method was developed that can exploit one-dimensional topology displacements available in near-term quantum architectures based on Rydberg atoms. For the evaluated quantum circuits and technology parameters, the developed method incurred a quantum circuit depth reduction of up to 58% and a fidelity improvement of up to 29%. We demonstrated that quantum circuit mapping can be improved through one-dimensional topology displacements if the swap gate fidelity is lower than or the swap gate runtime is not much lower than the topology displacement runtime. The developed method can be used to map quantum circuits to near-term quantum architectures based on Rydberg atoms and provides technology parameters for experimentalists that can help extend the algorithmic opportunities of near-term Rydberg architectures.
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