 # On the Hardness of the Determinant: Sum of Regular Set-Multilinear Circuits

In this paper, we study the computational complexity of the commutative determinant polynomial computed by a class of set-multilinear circuits which we call regular set-multilinear circuits. Regular set-multilinear circuits are commutative circuits with a restriction on the order in which they can compute polynomials. A regular circuit can be seen as the commutative analogue of the ordered circuit defined by Hrubes,Wigderson and Yehudayoff [HWY10]. We show that if the commutative determinant polynomial has small representation in the sum of constantly many regular set-multilinear circuits, then the commutative permanent polynomial also has a small arithmetic circuit.

## Authors

##### This week in AI

Get the week's most popular data science and artificial intelligence research sent straight to your inbox every Saturday.

## 1 Introduction

Arithmetic circuit complexity studies the complexity of computing polynomials using arithmetic operations. Arithmetic circuits are a natural computational model for computing and describing polynomials. Arithmetic circuit is a directed acyclic graph with internal nodes labeled by + or , and leaves labeled by either variables or elements from a underlying field . The complexity measures associated with arithmetic circuits are size, which measures number of gates in the circuit, and depth, which measures length of the longest path from a leaf to the output gate in the circuit. Two important examples of polynomial family are the determinant and the permanent polynomials. The determinant polynomial is ubiquitous in linear algebra, and it can be computed by polynomial-sized arithmetic circuits (see e.g., ). On the other hand, the permanent of 0/1 matrices is #P-complete , where #P corresponds to the counting class in the world of Boolean complexity classes. Thus, it is believed that, over fields of characteristic different from 2, the permanent polynomial family cannot be computed by any polynomial-sized circuit family. A central open problem of the field is proving super-polynomial size lower bounds for arithmetic circuits that compute the permanent polynomial . Motivated by this problem, Valiant, in his seminal work , defined the arithmetic analogues of P and NP: denoted by VP and VNP. Informally, VP consists of multivariate (commutative) polynomials that have polynomial size circuits. Valiant showed that is VNP-complete w.r.t. projection reductions. Thus, iff requires arithmetic circuits of size super-polynomial in .

Set-multilinear circuits are introduced in the work of . Let be a field and be a partition of the variable set . A set-multilinear polynomial w.r.t. this partition is a homogeneous degree multilinear polynomial such that every nonzero monomial of has exactly one variable from , for all . Some of the well-known polynomial families like the permanent and the determinant , are set-multilinear. The variable set is and the partition can be taken as the row-wise partition of the variable set. I.e.  for . In this work, we study the set-multilinear circuit complexity of the determinant polynomial . A set-multilinear arithmetic circuit computing w.r.t. the above partition of , is a directed acyclic graph such that each in-degree node of the graph is labeled with an element from . Each internal node of is of in-degree , and is either a gate or gate. With each gate we can associate a subset of indices and the polynomial computed by the circuit at is set-multilinear over the variable partition . If is a gate then for each input of , . If is a gate with inputs and then . Clearly, in a set-multilinear circuit every gate computes a set-multilinear polynomial (in a syntactic sense). The output gate of computes the polynomial , which is set-multilinear over the variable partition . The size of is the number of gates in it and its depth is the length of the longest path from an input gate to the output gate of . Additionally, a set-multilinear circuit is called a set-multilinear formula if out-degree of every gate is bounded by .

Set-multilinear arithmetic circuits are a natural model for computing set-multilinear polynomials. It can be seen that each set-multilinear polynomial can be computed by a set-multilinear arithmetic circuit. For set-multilinear formulas, super-polynomial size lower bounds are known . Super-polynomial lower bounds for a class of set-multilinear ABPs computing the determinant is shown in . It is known that proving super-polynomial lower bound result for general set-multilinear circuits computing the permanent polynomial would imply that requires super-polynomial size non-commutative arithmetic circuits, and this is an open problem for over three decades. Non-commutative circuits are a restriction on the computational power of circuits. Though non-commutative circuits compute non-commutative polynomials, one can study what is the power of commutativity in computing the polynomial. Noncommutative arithmetic circuit models are well studied, see e.g., [6, 2, 5]. In , it was shown that computing the non-commutative determinant polynomial is as hard as computing the commutative permanent polynomial.

### 1.1 Our Results

To explain our results, we first define the computational model that we study. Let denote the set of all permutations over the set .

###### Definition 1 (Regular Set-Multilinear Circuits).

Let be a partition of the variable set . Let . A set-multilinear circuit that computes a set-multilinear polynomial w.r.t the above partition is called regular set-multilinear circuit w.r.t , if every gate in is associated with an interval w.r.t . In other words, defines an ordering and every gate in is associated with an interval w.r.t -ordering

Let be a regular set-multilinear circuit w.r.t computing a commutative polynomial of degree . Let be a gate in computing the polynomial of degree . By definition, is a set-multilinear polynomial w.r.t , where . Let .

Since for each gate in , can be viewed as an interval w.r.t , the two children and of can be designated as left and right child. In particular, for each product gate with children and such that , we refer to as the left child of , and as the right child of .

We make the following observations about regular set-multilinear circuits:

• If is an input gate (leaf node) labeled by a field constant, then , where is the empty sequence. If is an input gate labeled by a variable , then .

• If is an product gate, then , where the interval is obtained by appending with .

• If is a sum gate, then .

One can define several versions of non-commutative polynomial. Non-commutative circuits computing the polynomial, where the first index of the variables in each monomial is in increasing order, can be seen as regular set-multilinear w.r.t the identity permutation. In , it was shown that computing the non-commutative determinant polynomial is as hard as computing the commutative permanent polynomial. A natural next step is to find the set-multilinear circuit complexity of the commutative determinant polynomial.

We study the computational complexity of the commutative determinant polynomial computed by a sum of regular set-multilinear circuits. We show that if the determinant polynomial is computed by a circuit of size , where is a sum of constantly-many regular set-multilinear circuits, then we can modify to compute the permanent polynomial ,where , such that the new circuit size is polynomially related to the size of . We remark that in our result, there is no restriction on the number of different parse tree types/shapes (see e.g., ) allowed in each regular circuits.

One can view this as a generalization of the result shown in  to a class of set-multilinear circuits computing the determinant polynomial . We obtain our result by carefully combining Erdös-Szekeres theorem  and some properties that we prove about regular set-multilinear circuits and the result of .

## 2 Preliminaries

### 2.1 Determinant and Permanent

###### Definition 2.

(Commutative Determinant and Permanent) Given the set of variables , the commutative determinant and the commutative permanent over , denoted by and respectively, are -variate polynomials of degree given by:

 DETn(X)=∑σ∈Snsgn(σ)n∏i=1xi,σ(i)
 PERMn(X)=∑σ∈Snn∏i=1xi,σ(i),

Non-commutative determinant can be defined in various ways depending on the order in which variables are multiplied. One natural type of non-commutative determinant, called the Cayley determinant , is one where the order of multiplication is the identity permutation w.r.t first index of the variable.

### 2.2 Erdös-Szekeres Theorem

###### Theorem 1 (Erdös-Szekeres Theorem, ).

Let be a positive integer. Let S be a sequence of distinct integers of length at least . Then, there exists a monotonically increasing subsequence of S of length , or a monotonically decreasing subsequence of S of length .

Let be two matrices. The following are known facts about the determinant and permutations.
Fact 1: .
Fact 2: The determinant of a permutation matrix is either +1 or -1.
Fact 3: Let . Then .

For let .

## 3 Hardness of the Determinant: Sum of Two Regular Set-Multilinear Circuits

In this section, we show that if the determinant polynomial is computed by a sum of two regular set-multilinear circuits then the permanent polynomial can also be represented as a regular set-multilinear circuit. This result involves all the techniques which will be used in the main result and it is easy to explain in this sum of two regular circuits model. In the next section, we will prove the result for sum of constantly many regular set-multilinear circuits. We note that all our polynomials are commutative. For the purpose of readability, we sometimes ignore the floor operation.

Let be the set of variables. Let for . Our aim is to show that if computing the determinant polynomial , where the circuits , are regular set-multilinear circuits w.r.t respectively, then there is an efficient transformation that converts the given circuit to another circuit computing the permanent polynomial of degree . Given computing , if then we can directly adapt the result of  and get a circuit computing the permanent polynomial of degree . If is not even then we can substitute variables in the set suitably from such that computes before using the result of .

The case of needs more work that we explain now. The idea is to use the well known Erdös-Szekeres Theorem  that guarantees that any sequence of distinct integers contains a subsequence of length at least that is either monotonically increasing or decreasing. By viewing as a sequence of integers, we apply the above result to permutations . We first apply it to and let be the set of indices that appear in this monotone subsequence. If the subsequence is monotonically increasing then we do substitutions in so that it computes the determinant polynomial of matrix whose rows and columns are labeled by the elements of set . This is done by making suitable substitutions to the variables in from in the given circuit . After this we get a circuit from that computes where .

We note that where and is in increasing order. If , then we can use  and get the permanent of degree . Otherwise, we apply Erdös-Szekeres Theorem to permutations . In particular, this will give us a monotone subsequence in with length at least . If this sequence is increasing, then the same subsequence is also increasing in as we already noted that it is in increasing order. Let be the set of indices that appear in this monotone subsequence. Now we project, as before so that it computes the determinant polynomial of a matrix whose rows and columns are labeled by the elements in set . After substituting from for each variable in the given circuit , we get a regular circuit that computes , where .

The important thing to note here is that in the new circuit , where , both and are the same, i.e., . We can rename the variable sets in to . For example, if is the lowest index then we can rename to , and for all , rename to . Similarly, the -th lowest index is modified. After these modifications, we can assume that .

As we noted before, any non-commutative circuit computing , where the first index of the variables in each monomial is in increasing order, can be seen as regular set-multilinear w.r.t identity permutation. Now we can apply the following theorem (Theorem 10 from ) to get our result.

###### Theorem 2.

(Theorem 10, ) For any , if there is a non-commutative circuit of size computing the Cayley determinant then there is a circuit of size polynomial in and that computes the Cayley permanent .

If is not an even number then we ignore the variable set in by following substitutions: and for all , and . After this substitutions, we have a circuit that computes the determinant polynomial. Now applying the above theorem we get a circuit that computes the permanent polynomial of degree .

We now explain how to handle if Erdös-Szekeres Theorem guarantees only monotonically decreasing sequence. For that we define the reverse of a regular set-multilinear circuit w.r.t computing a polynomial . This results in a regular set-multilinear circuit w.r.t , where , computing the same commutative polynomial as circuit . We note that if has monotonically decreasing subsequence of length then has a monotonically increasing subsequence of same length . We obtain by interchanging the left and right children of product gates in . This is proved in the following lemma.

###### Lemma 1 (Reversal Lemma).

Let be a set of variables and be a partition of , where for all , . Let be a regular set-multilinear circuit w.r.t a permutation computing the polynomial . Then, there exists a regular set-multilinear circuit w.r.t where computing the same commutative polynomial as circuit . Moreover, the size of is same as that of .

###### Proof.

First, we describe the construction of the circuit , and then prove its correctness. Let be a gate in . As is a regular set-multilinear circuit w.r.t , we have an interval w.r.t the permutation associated with the gate .
Construction of : Starting with the product gates at the bottom of and gradually moving up level-by-level, swap the left and right children of each product gate.
Correctness: We show by induction on depth of that both circuits and compute the same polynomial and is a regular set-multilinear circuit w.r.t , where . Let and denote the polynomials computed at any node in and , respectively. Let . We will show that and are the same polynomial and the only difference is in their orders. That is, , where is written in reverse (i.e., the interval is reversed).

The proof is by induction on the depth of the circuit . Let denote the polynomial computed by .

Base Case: The base case is any node at depth 0, i.e., a leaf node. Consider any leaf node . Then , the polynomial computed at , is either a variable or a field constant in . If is a field constant, then . Therefore, . If is a variable , then . Therefore, the . In both cases, and .

Induction Hypothesis: Assume for any node at depth , , that and .

Induction Step: Consider any node at depth , with and as its left and right children, respectively. By induction hypothesis, and . Similarly, and .

If is a product gate, then , which is equivalent to by induction hypothesis. By induction hypothesis, is appended with . The , and . Therefore, .

If is a sum gate, then , which is equivalent to by induction hypothesis. As is a sum gate, . As by induction hypothesis, we have that and . Thus, .

The size of is same as that of because the only modification we are doing to is swapping the children of product gates. This completes proof of the lemma. ∎

Using Lemma 1, we can handle the monotonically decreasing sequence without modifying the polynomial computed by a regular set-multilinear circuit. This gives us a circuit that computes the permanent polynomial of degree . We remark that Lemma 1 can be adapted for non-commutative circuits as well.

We now explain how to get the permanent polynomial of degree instead of . This gives us quadratic improvement in the degree of the permanent polynomial. This is based on the observation that if is a regular set-multilinear circuit w.r.t a permutation computing the determinant polynomial , then for any permutation , there is another regular set-multilinear circuit w.r.t computing the same determinant polynomial . Moreover, the size of is at most one more than the size of .

In other words, composition of permutations can be efficiently carried out for regular set-multilinear circuits computing the determinant polynomial .

###### Lemma 2 (Composition Lemma).

Let be the sum of two regular set-multilinear circuits computing the determinant polynomial , where the circuits , are regular set-multilinear circuits w.r.t respectively. Then for any permutation , there exists another circuit that computes . is also a sum of two regular set-multilinear circuits (regular set-multilinear w.r.t ). Moreover, the size of is at most one more than the size of .

###### Proof.

First, we describe the construction of the circuit and then prove its correctness.
Construction of : For every variable in , substitute the variable . Let be this modified circuit. If is -1, then add a leaf node labeled -1 and multiply the root node of with this leaf node. Let be this modified circuit. The size of is at most one more than the size of .
Correctness: Now we will prove that computes . Let and be any two monomials in computed by . Let and be the monomials obtained by applying to the first index of each of the variables in and respectively. The permutations corresponding to and are and respectively.

• Case 1: . We show that in . We note that and could be computed by circuits and respectively. Thus, the order of variables appearing in and could be different in general. By construction of , is substituted by the variable . Since , we get .

• Case 2: . We show that in . Since , there exists a variable in and a variable in such that . Suppose , then . Then, . This implies . Suppose , then , which again implies that .

By construction of , we note that coefficients of monomials are not affected. Now we will prove that computes . Let be a matrix where row contains all variables of the set . In other words, the entry of -th row and -th column of the matrix is . Let . By changing to , in effect it permutes the rows of . In other words, the determinant is equal to the determinant of , where is the permutation matrix. The entry of -th and -th column of is 1 iff and 0 otherwise. By Fact 1 and 2, we have

Thus, composing the permutation with maps different monomials to different monomials and in effect does not change the determinant computed except that the sign changes. Note that (by Fact 3). Therefore, if , then the coefficients of and are the negatives of the coefficients of and respectively. Therefore, if , computes , as the leaf gate labeled -1 multiplied to the output gate ensures that computes . However, the coefficients of and are the same as the coefficients of and respectively, if . In the case that , there is no need of this leaf gate. In both cases, the polynomial computed by is .

Now we will show that , . The proof is by induction on the depth of the circuit. We will prove it for . The proof is similar for the circuit . Recall that is regular set-multilinear circuit w.r.t . Let be a gate in the circuit. We denote polynomial computed at in and by and respectively.

Base Case: The base case is any node at depth 0, i.e, a leaf node. Let be any leaf node. Then is either a field constant or a variable . If , then the is the empty sequence . As there is no variable in , there is no change to be made. Therefore, , and therefore the claim trivially holds. If is a variable , then for some . We change to , which means .

Induction Hypothesis: Suppose the claim holds for any node at depth .

Induction Step: Consider any node at depth . Let and be its left and right children with degrees respectively.

• Case 1: is a sum gate. Thus, . Then .

• Case 2: is a product gate. Thus, . Let , where denote degrees of respectively.
Let and
. By IH, , and let . Then .

Thus, in both cases, the claim holds. This completes the proof of the lemma. ∎

Unlike Lemma 1, we note that in general this composition operation may not hold for any polynomial computed by a regular circuit. For example, if is a regular set-multilinear circuit computing the polynomial then by swapping the 3rd and 4th indices, we get a different polynomial . Now we have all results needed to the case where the determinant polynomial is computed by a sum of two regular set-multilinear circuits.

###### Theorem 3.

Let . If the determinant polynomial over is computed by a circuit of size , where is the sum of two regular set-multilinear circuits, then the permanent polynomial of degree can be computed by a regular set-multilinear circuit of size polynomial in and .

###### Proof.

Let , where the circuits , are regular set-multilinear circuits w.r.t respectively. We show that there is an efficient transformation that converts the given circuit to another circuit computing the permanent polynomial of degree .

Without loss of generality, we can assume that is the identity permutation. This is because otherwise by Lemma 2 we can get a new circuit with as the two permutations used. This does not increase the circuit size. By the Erdös-Szekeres Theorem, there is a monotone subsequence of length . Let be the set of all such indices.

• Case 1: Subsequence is increasing. As is the identity, the same subsequence of indices in is also increasing. We do the following substitutions. For all , set and for all and , set and . After this substitutions, the circuit computes the determinant polynomial over and the order of the subsequence in both and are the same. We rename the variable sets in as follows: if is the -th lowest index in the subsequence then we rename to , and for all , rename to . The modified circuit computes the determinant polynomial over and it is regular w.r.t the identity permutation in .

• Case 2: Subsequence is decreasing. Then by Lemma 1, we modify the circuit to get a new circuit computing the same polynomial as computed by the circuit but the new circuit is regular set-multilinear w.r.t the permutation . We note that, by applying Lemma 1, no sign change occurs to the determinant polynomial. In this modified (second) circuit, the corresponding subsequence now becomes increasing. This reduces this case to case 1.

Thus, after this modifications we have a new regular circuit , that computes the determinant polynomial of degree , w.r.t the identity permutation. If is not an even number then we substitute variables in as explained before. Thus, computes the determinant polynomial of even degree. Now by the result of , we can compute the permanent polynomial of degree by a circuit of size polynomial in and . This completes the proof of the theorem. ∎

## 4 Hardness of the Determinant: Sum of Constantly-Many Regular Set-Multilinear circuits

In this section, we show that if the determinant polynomial is computed by a sum of constantly many regular set-multilinear circuits then the permanent polynomial , depends on , computed a regular circuit. The proof of the following lemma is omitted due to lack of space. This is a generalization of the (composition) Lemma 2 but idea of the proof is similar.

###### Lemma 3.

Let be a sum of regular set-multilinear circuits such that computes . Let be regular set-multilinear w.r.t respectively, where each . For any , let be the circuits obtained by substituting for each variable in in each of the circuits. Let be the sum of . Then also computes . Moreover, the size of is at most one more than the size of .

Without loss of generality we can assume that for each , . Otherwise, we can combine all ’s which use same into a single using addition gates and get a circuit that is a sum of regular set-multilinear circuits, where . Therefore, is the sum of regular set-multilinear circuits such that no two permutations used by any two of these circuits is same. We call such a circuit as -regular circuit.

###### Theorem 4.

Let be the sum of -many regular set-multilinear circuits, of size , computing the determinant polynomial . Then there exists a regular set-multilinear circuit whose size is at most that computes the determinant polynomial , where and .

###### Proof.

Let , where the circuits are regular set-multilinear circuits w.r.t , . We show that there is an efficient transformation that converts the given circuit to another circuit computing the determinant polynomial of degree , .

Without loss of generality, we can assume that is the identity permutation. This is because otherwise by Lemma 2 we can get a new circuit where is a regular set-multilinear circuit w.r.t the permutation , where . We note that computes the same polynomial as circuit and both circuits have the same size.

Denote by the circuit obtained after the -th iteration, where . We will show that computes the determinant polynomial of degree and is a -regular circuit.

At iteration 0, this condition holds, as computes the determinant polynomial over and is a -regular circuit.

Suppose the condition is true for some , where . We will show that