The Cayley groupoid membership problem (sometimes also called the generation problem) asks, given a multiplication table representing a groupoid , a subset of and an element of , whether can be expressed as a product of elements of . In 1976, Jones and Laaser showed that this problem is -complete . Barrington and McKenzie later studied natural subproblems and connected them to standard subclasses of .
When restricting the set of valid inputs to inputs with an associative multiplication table, the problem becomes -complete . We will call this variant of the problem the Cayley semigroup membership problem and analyze its complexity when further restricting the semigroups encoded by the input. For a class of finite semigroups , the Cayley semigroup membership problem for is formally defined as follows.
|Input:||The Cayley table of a semigroup , a set and an element|
|Question:||Is in the subsemigroup of generated by ?|
The motivation for investigating this problem is two-fold. Firstly, there is a direct connection between the Cayley semigroup membership problem and decision problems for regular languages: a language is regular if and only if there exist a finite semigroup , a morphism and a set such that . Thus, morphisms to finite semigroups can be seen as a way of encoding regular languages. For encoding such a semigroup, specifying the multiplication table is a natural choice. Deciding emptiness of a regular language represented by a morphism to a finite semigroup and a set boils down to checking whether any of the elements from the set is contained in the subsemigroup of generated by the images of the letters of under . Conversely, the Cayley semigroup membership problem is a special case of the emptiness problem for regular languages: an element is contained in the subsemigroup generated by a set if and only if the language with and is non-empty.
Secondly, we hope to get a better understanding of the connection between algebra and low-level complexity classes included in in a fashion similar to the results of . In the past, several intriguing links between so-called varieties of finite semigroups and the computational complexity of algebraic problems for such varieties were made. For example, the fixed membership problem for a regular language was shown to be in if its syntactic monoid is aperiodic, in if the syntactic monoid is solvable and -complete otherwise [7, 9]. It is remarkable that in most results of this type, both the involved complexity classes and the algebraic varieties are natural. On a language-theoretical level, varieties of finite semigroups correspond to subclasses of the regular languages closed under Boolean operations, quotients and inverse morphisms.
We already mentioned the work of Jones and Laaser on the Cayley groupoid membership problem , the work of Jones, Lien and Laaser on the Cayley semigroup membership problem  and the work of Barrington and McKenzie on subproblems thereof . The semigroup membership problem and its restrictions to varieties of finite semigroups was also studied for other encodings of the input, such as matrix semigroups [2, 6, 4] or transformation semigroups [23, 17, 5, 11, 14, 13, 12].
The group version of the Cayley semigroup membership problem (, using our notation) was first investigated by Barrington and McKenzie in 1991 . They observed that the problem is in symmetric log-space, which has been shown to be the same as deterministic log-space by Reingold in 2008 , and suggested it might be complete for deterministic log-space. However, all attempts to obtain a hardness proof failed (in fact, their conjecture is shown to be false in this work). There was no progress in a long time until Barrington, Kadau, Lange and McKenzie showed that for Abelian groups and certain solvable groups, the problem lies in the complexity class and thus, cannot be hard for any complexity class containing Parity in 2001 . The case of arbitrary groups remained open.
We generalize previous results on Abelian groups to arbitrary commutative semigroups. Then, using novel techniques, we show that the Cayley semigroup membership problem for the variety of finite groups is contained in and thus, cannot be hard for any class containing Parity. Our approach relies on the existence of succinct representations of group elements by algebraic circuits. More precisely, it uses the fact that every element of a group can be computed by an algebraic circuit of size over any set of generators. Since in the Cayley semigroup membership problem, the algebraic structure is not fixed, we introduce so-called Cayley circuits, which are similar to regular algebraic circuits but expect the finite semigroup to be given as part of the input. We prove that these Cayley circuits can be simulated by sufficiently small unbounded fan-in Boolean circuits. We then use this kind of simulation to evaluate all Cayley circuits, up to a certain size, in parallel.
By means of a closer analysis and an extension of the technique used by Jones, Lien and Laaser in , we also show that the Cayley semigroup membership problem remains -complete when restricting the input to -simple semigroups or to nilpotent semigroups.
Combining our results, we obtain that the Cayley semigroup membership problem for the class , which consists of all finite groups and all finite commutative semigroups, is decidable in (and thus not -hard) while the Cayley semigroup membership problem for the minimal variety of finite semigroups containing is -complete.
Finally, we discuss the extent to which our approach can be used to establish membership of Cayley semigroup membership variants to the complexity class . Here, instead of simulating all circuits in parallel, we use an idea based on repeated squaring. This technique generalizes some of the main concepts used in .
A semigroup is a subsemigroup of if is a subset of closed under multiplication. The direct product of two semigroups and is the Cartesian product equipped with componentwise multiplication. A subsemigroup of a direct product is also called subdirect product. A semigroup is a quotient of a semigroup if there exists a surjective morphism .
A variety of finite semigroups is a class of finite semigroups which is closed under finite subdirect products and under quotients. Since we are only interested in finite semigroups, we will henceforth use the term variety for a variety of finite semigroups. Note that in the literature, such classes of semigroups are often called pseudovarieties, as opposed to Birkhoff varieties which are also closed under infinite subdirect products. The following varieties play an important role in this paper:
, the class of all finite groups,
, the class of all finite Abelian groups,
, the class of all finite commutative semigroups,
, the class of all finite nilpotent semigroups, i.e., semigroups where the only idempotent is a zero element.
The join of two varieties and , denoted by , is the smallest variety containing both and . A semigroup is -simple if it contains a zero element and if for each , one has . The class of finite -simple semigroups does not form a variety.
We assume familiarity with standard definitions from circuit complexity. A function has quasi-polynomial growth if it is contained in for some fixed . Throughout the paper, we consider the following unbounded fan-in Boolean circuit families:
, languages decidable by circuit families of depth and polynomial size,
, languages decidable by circuit families of depth and quasi-polynomial size,
, languages decidable by circuit families of depth and polynomial size,
, languages decidable by circuit families of depth and polynomial size,
, languages decidable by circuit families of polynomial size (and unbounded depth).
We allow NOT gates but do not count them when measuring the depth or the size of a circuit. We will also briefly refer to the complexity classes , , , and .
3 Hardness Results
Before looking at parallel algorithms for the Cayley semigroup membership problem, we establish two new -hardness results. To this end, we first analyze the construction already used by Jones, Lien and Laaser . It turns out that the semigroups used in their reductions are -simple which leads to the following result.
For a class containing all -simple semigroups, the Cayley semigroup membership problem is -complete.
To keep the proof self-contained, we briefly describe the reduction from the connectivity problem for directed graphs (henceforth called STConn) to the Cayley semigroup membership problem given in .
Let be a directed graph. We construct a semigroup on the set where is a zero element and the multiplication rule for the remaining elements is
By construction, the subsemigroup of generated by contains an element if and only if is reachable from in . To see that the semigroup is -simple, note that for pairs of arbitrary elements and , one has , which implies . ∎
In order to prove -completeness for another common class of semigroups, we need a slightly more advanced construction reminiscent of the “layer technique”, which is usually used to show that STConn remains -complete when the inputs are acyclic graphs.
is -complete (under many-one reductions).
Following the proof of Theorem 1, we describe an reduction of STConn to .
Let be a directed graph with vertices. We construct a semigroup on the set where is a zero element and the multiplication rule for the remaining elements is
The subsemigroup of generated by contains an element if and only if is reachable (in less than steps) from in . Clearly, the zero element is the only idempotent in , so is nilpotent. Also, it is readily verified that the reduction can be performed by an circuit family. ∎
4 Parallel Algorithms for Cayley Semigroup Membership
Algebraic circuits can be used as a succinct representation of elements in an algebraic structure. This idea will be the basis of the proof that is in . Unlike in usual algebraic circuits, in the context of the Cayley semigroup membership problem, the algebraic structure is not fixed but given as part of the input. We will introduce so-called Cayley circuits to deal with this setting. Since these circuits will be used for the Cayley semigroup membership problem only, we confine ourselves to cases where the algebraic structure is a finite semigroup.
4.1 Cayley Circuits
A Cayley circuit is a directed acyclic graph with topologically ordered vertices such that each vertex has in-degree or . In the following, to avoid technical subtleties when squaring an element, we allow multi-edges. The vertices of a Cayley circuit are called gates. The vertices with in-degree are called input gates and vertices with in-degree are called product gates. Each Cayley circuit also has a designated gate of out-degree , called the output gate. For simplicity, we assume that the output gate always corresponds to the maximal gate with regard to the vertex order. The size of a Cayley circuit , denoted by , is the number of gates of . An input to a Cayley circuit with input gates consists of a finite semigroup and elements of . Given such an input, the value of the -th input gate is and the value of a product gate, whose predecessors have values and , is the product in . The value of the circuit is the value of its output gate. We will denote the value of under a finite semigroup and elements by .
A Cayley circuit can be seen as a circuit in the usual sense: the finite semigroup and the input gate values are given as part of the input and the functions computed by product gates map a tuple, consisting of semigroup and two elements of , to another element of . We say that a Cayley circuit with input gates can be simulated by a family of unbounded fan-in Boolean circuits if, given the encodings of a finite semigroup and of elements of of total length , the circuit computes the encoding of . For a semigroup with elements, we assume that the elements of are encoded by the integers such that the encoding of a single element uses bits. The semigroup itself is given as a multiplication table with entries of bits each.
Let be a Cayley circuit of size . Then, can be simulated by a family of unbounded fan-in constant depth Boolean circuits of size at most .
Let be a Cayley circuit with input gates and product gates. We want to construct a Boolean circuit which can be used for all finite semigroups with a fixed number of elements . The input to such a circuit consists of bits.
For a fixed vector, one can check using a single AND gate (and additional NOT gates at some of the incoming wires) whether corresponds to the sequence of values occurring at the gates of under the given inputs. To this end, for each gate of , we add incoming wires to this AND gate: if the -th gate of is an input gate, we feed the bits of the corresponding input value into the AND gate, complementing the -th bit if the -th bit of is zero. If the -th gate is a product gate and has incoming wires from gates and , we connect the entry of the multiplication table to the AND gate, again complementing bits corresponding to 0-bits of .
To obtain a Boolean circuit simulating , we put such AND gates for all vectors of the form in parallel. In a second layer, we create OR gates and connect the AND gate for a vector to the -th OR gate if and only if the -th bit of is one. The idea is that exactly one of the AND gates — the gate corresponding to the vector of correct guesses of the gate values of — evaluates to and the corresponding output value then occurs as output value of the OR gates.
This circuit has depth and size . ∎
4.2 The Poly-Logarithmic Circuits Property
When analyzing the complexity of , Barrington et al. introduced the so-called logarithmic power basis property. A class of semigroups has the logarithmic power basis property if any set of generators for a semigroup of cardinality from the family has the property that every element of can be written as a product of at most many powers of elements of . In , it was shown that the class of Abelian groups has the logarithmic power basis property. Using a different technique, this result can easily be extended to arbitrary commutative semigroups.
The variety has the logarithmic power basis property.
Suppose that is a commutative semigroup of size and let be a set of generators for . Let be an arbitrary element. We choose to be the smallest value such that there exist elements and integers with . Assume, for the sake of contradiction, that .
The power set forms a semigroup when equipped with set union as binary operation. Consider the morphism defined by for all . This morphism is well-defined because is commutative.
Since , we know by the pigeon hole principle that there exist two sets with and . We may assume, without loss of generality, that there exists some . Now, because
and since neither nor contain , we know that can be written as a product of powers of elements with and , contradicting the choice of . ∎
For the analysis of arbitrary groups, we introduce a more general concept. It is based on the idea that algebraic circuits (Cayley circuits with fixed inputs) can be used for succinct representations of semigroup elements.
Let be a positive integer.
Then, one can construct a Cayley circuit of size at most
which computes, given a finite semigroup and an element as
input, the power in .
If , the circuit only consists of the input gate.
If is even, the circuit is obtained by taking the circuit for ,
adding a product gate and creating two edges from the output gate of the
circuit for to the new gate.
If is odd, the circuit is obtained by taking the circuit for
is odd, the circuit is obtained by taking the circuit forand connecting it to a new product gate. In this case, the second incoming edge for the new gate comes from the input gate.
A class of semigroups has the poly-logarithmic circuits property if there exists a constant such that for each semigroup of cardinality from the class, for each subset of and for each in the subsemigroup generated by , there exists a Cayley circuit of size with input gates and there exist such that .
Let be a family of semigroups which is closed under subsemigroups and has the logarithmic power basis property. Then has the poly-logarithmic circuits property.
Let be a subset of a semigroup of cardinality . Let be in the subsemigroup generated by . Then, we have for some with and . By the pigeon hole principle, we may assume without loss of generality that . Using the method from Example 1, one can construct Cayley circuits of size at most such that for all and . Using additional product gates, these circuits can be combined to a single circuit with .
In total, the resulting circuit consists of gates. ∎
Let be a finite group and let be a subset of . A sequence of elements of is a straight-line program over if for each , we have or or for some . The number is the length of the straight-line program and the elements of the sequence are said to be generated by the straight-line program. The following result by Babai and Szemerédi  is commonly known as Reachability Lemma.
Lemma 6 (Reachability Lemma).
Let be a finite group and let be a set of generators of . Then, for each element , there exists a straight-line program over generating which has length at most .
The proof of this lemma is based on a technique called “cube doubling”. For details, we refer to . It is now easy to see that groups admit poly-logarithmic circuits.
The variety has the poly-logarithmic circuits property.
Let be a group of order , let be a subset of and let be an element in the subgroup of generated by . By Lemma 6, we know that there exists a straight-line program over with and . We may assume that the elements are pairwise distinct. It suffices to describe how to convert this straight-line program into a Cayley circuit and values such that .
We start with an empty circuit and with and process the elements of the straight-line program left to right. For each element , we add gates to the circuit. The output gate of the circuit obtained after processing the element will be called the -gate.
If the current element is contained in , we increment , add a new input gate to the circuit and let . If the current element can be written as a product with , we add a new product gate to the circuit and connect the -gate as well as the -gate to this new gate. If the current element is an inverse with , we take a circuit with gates and with for all . Such a circuit can be built by using the powering technique illustrated in Example 1. We add to , replacing its input gate by an edge coming from the -gate.
The resulting circuit has size at most . ∎
We will now show that for classes of semigroups with the poly-logarithmic circuits property, one can solve the Cayley semigroup membership problem in .
Let be a class of semigroups with the poly-logarithmic circuits property. Then is in .
We construct a family of unbounded fan-in constant-depth Boolean circuits with quasi-polynomial size, deciding, given the multiplication table of a semigroup , a set and an element as inputs, whether is in the subsemigroup generated by .
Since has the poly-logarithmic circuits property, we know that, for some constant , the element is in the subsemigroup generated by if and only if there exist a Cayley circuit of size and inputs such that . There are at most different Cayley circuits of this size. Let us consider one of these Cayley circuits . Suppose that has input gates. By Proposition 3, there exists a unbounded fan-in constant-depth Boolean circuit of size deciding on input and elements whether . There are at most possibilities of connecting (not necessarily all) input gates corresponding to the elements of to this simulation circuit.
Thus, we can check for all Cayley circuits of the given size and all possible input assignments in parallel, whether the value of the corresponding circuit is , and feed the results of all these checks into a single OR gate to obtain a quasi-polynomial-size Boolean circuit. ∎
Both and are contained in .
As stated in the preliminaries, problems in cannot be hard for any complexity class containing Parity. Thus, we also obtain the following statement.
Let be a class of semigroups with the poly-logarithmic circuits property, such as the variety of finite groups or the variety of finite commutative semigroups . Then is not hard for any complexity class containing Parity, such as , , , or .
4.3 The Complexity Landscape of Cayley Semigroup Membership
Our hardness results and -algorithms have an immediate consequence on algebraic properties of maximal classes of finite semigroups for which the Cayley semigroup membership problem can be decided in . It relies on the following result, which can be seen as a consequence of  and the fact that the zero element in a semigroup is always central. For completeness, we provide a short and self-contained proof.
The variety is included in .
We show that every finite nilpotent semigroup is a quotient of a subdirect product of a finite group and a finite commutative semigroup. Note that in a finite nilpotent semigroup , there exists an integer such that for each , the power is the zero element. Let be the commutative semigroup with the product of two elements and defined as .
Let be a finite group generated by the set of non-zero elements of such that no two products of less than elements of evaluate to the same element of . Such a group exists because the free group over is residually finite .
Let be the subsemigroup of generated by . Now, we define a mapping as follows. Each element of the form is mapped to zero. For every with , there exists, by choice of and by the definition of , a unique factorization with . We map to the product evaluated in . It is straightforward to verify that is a surjective morphism and thus, is a quotient of . ∎
There exist two varieties and such that both and are contained in (and thus not hard for any class containing Parity) but is -complete.
The corollary is a direct consequence of the previous proposition, Corollary 9 and Theorem 2. As was observed in  already, Cayley semigroup problems seem to have “strange complexity”. The previous result makes this intuition more concrete and suggests that it is difficult to find “nice” descriptions of maximal classes of semigroups for which the Cayley semigroup membership problem is easier than any -complete problem.
4.4 Connections to
In a first attempt to solve outstanding complexity questions related to the Cayley semigroup membership problem, Barrington et al. introduced the complexity class . The approach presented in the present paper is quite different. This raises the question of whether our techniques can be used to design -algorithms for Cayley semigroup membership. Note that and are known to be incomparable, so we cannot use generic results from complexity theory to simulate circuits using families of circuits or vice versa. The direction follows from bounds on the average sensitivity of bounded-depth circuits 
; using these bounds, one can show that there exists a padded version of theParity function which can be computed by a circuit family and cannot be computed by any circuit family. Conversely, each subset of of cardinality at most is decidable by a depth- circuit of size , but for each fixed , there is some large value such that the number of such subsets exceeds the number of different circuits of size . This shows that there exist languages in which are not contained in .
Designing an -algorithm which works for arbitrary classes of semigroups with the poly-logarithmic circuits property seems difficult. However, for certain special cases, there is an interesting approach, based on the repeated squaring technique. In the remainder of this section, we sketch one such special case.
For a Cayley circuit, the width of a topological ordering of the gates is the smallest number such that for each , at most product gates from the set are connected to gates in . Let be the set of product gates, which belong to and are connected to gates in . The subcircuit induced by can be interpreted as a Cayley circuit computing multiple output values . The subcircuit induced by can be seen as a circuit which, in addition to the input gates of the original circuit, uses the gates from as input gates. The width of a Cayley circuit is the smallest width of a topological ordering of its gates. Let us fix some width .
We introduce a predicate which is true if there exists a Cayley circuit of width at most and size at most with additional input gates and additional passthrough gates (which have in-degree 1 and replicate the value of their predecessors), such that the elements occur as values of the passthrough gates when using as values for the additional input gates and using any subset of the original inputs as values for the remaining input gates. The additional input gates (resp. passthrough gates) are not counted when measuring the circuit size but are considered as product gates when measuring width and they have to be the first (resp. last) gates in all topological orderings considered for width measurement. For each fixed , there are only such predicates.
The truth value of a predicate with can be computed by a constant-depth unbounded fan-in Boolean circuit of polynomial size. This is achieved by computing all binary products of the elements and elements of the input set . For , the predicate is true if and only if there exist such that both and are true. Having the truth values of all tuples for at hand, this can be checked with a polynomial number of gates in constant depth because there are only different vectors .
For a class of semigroups with Cayley circuits of bounded width and poly-logarithmic size, we obtain a circuit family of depth deciding Cayley semigroup membership: the predicates are computed for increasing values of , until exceeds the logarithm of an upper bound for the Cayley circuit size and then, we return for the element given in the input and for an arbitrary element . It is worth noting that the circuits constructed in the proof of Proposition 5 have width at most , so our -algorithm is a generalization of the Double-Barrelled Recursive Strategy and the proof that presented in . In particular, the procedure above yields a self-contained proof of the following result.
Let be a class of semigroups which is closed under taking subsemigroups and has the logarithmic power basis property. Then is in .
By Lemma 4, we obtain the following corollary.
is contained in .
5 Summary and Outlook
We provided new insights into the complexity of the Cayley semigroup membership problem for classes of finite semigroups, giving parallel algorithms for the variety of finite commutative semigroups and the variety of finite groups. We also showed that a maximal class of semigroups with Cayley semigroup membership decidable by circuits does not form a variety. Afterwards, we discussed applicability to .
It is tempting to ask whether one can find nice connections between algebra and the complexity of the Cayley semigroup membership problem by conducting a more fine-grained analysis. For example, it is easy to see that for the varieties of rectangular bands and semilattices, the Cayley semigroup membership problem is in . Does the maximal class of finite semigroups, for which the Cayley semigroup membership problem is in , form a variety of finite semigroups? Is it possible to show that does not contain ? Potential approaches to tackling the latter question are reducing small distance connectivity for paths of non-constant length  to or developing a suitable switching lemma. Another related question is whether there exist classes of semigroups for which the Cayley semigroup membership problem cannot be -hard but, at the same time, is not contained within .
Moreover, it would be interesting to see whether the Cayley semigroup membership problem can be shown to be in for all classes of semigroups with the poly-logarithmic circuits property. More generally, investigating the relation between and , as well as their relationships to other complexity classes, remains an interesting subject for future research.
I would like to thank Armin Weiß for several interesting and inspiring discussions, and for pointing out that is not contained within . I would also like to thank Samuel Schlesinger for comments which led to an improved presentation of the proof of Proposition 3 and for pointing out that results on the average sensitivity of bounded-depth circuits can be used to show that is not contained within . Moreover, I am grateful to the anonymous referees for providing helpful comments that improved the paper.
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