Arithmetic circuits (ACs) were introduced into the AI literature more than fifteen years ago as a tractable representation of probability distributions. The original work on these circuits proposed the compilation of such circuits from Bayesian networks, while identifying and assuming three circuit properties, called determinism, decomposability and smoothness(Darwiche, 2001a, b, 2003). Since then, the literature on using arithmetic circuits for probabilistic reasoning has seen two key developments. The first is the proposal made by (Lowd & Domingos, 2008) to learn these circuits directly from data—instead of just compiling them from models—therefore creating two distinct construction modes for these circuits. The second development, reported by (Poon & Domingos, 2011), amounted to proposing a class of arithmetic circuits that does not satisfy determinism, under the name of sum-product networks (SPNs).
An examination of the literature surrounding arithmetic circuits and their variants suggests that the implications of relaxing determinism are not very well understood, even leading to conflicting claims in some cases. The treatment of smoothness has also not been very consistent as far as its necessity for certain operations on arithmetic circuits, and the complexity of enforcing it. Our goal in this paper is to address some of these issues by providing a systematic and formal treatment of arithmetic circuits, while focusing on the precise roles and semantics of their various properties and the implications of relaxing determinism.
We make several contributions in this paper. We start by reconstructing the original definition of arithmetic circuits given in (Darwiche, 2002, 2003), while assuming that these circuits represent arbitrary factors, instead of just distributions induced by Bayesian networks (a particular class of factors). We then provide definitions for decomposability, smoothness and determinism in the context of this reconstruction, while isolating precisely the role that each one of these properties play. Some of what we report on this has already been observed in the literature, but we provide alternate or more formal proofs for the sake of a systematic and inclusive treatment. We also derive new results. The first of these is a separation theorem showing that relaxing determinism can lead to exponentially smaller arithmetic circuits, while preserving the ability of these circuits to compute marginals in linear time. This begs the question of whether anything is lost from relaxing determinism. On this front, we highlight a finding that has already been reported in the literature and introduce new ones. In particular, we provide an expanded proof for the observation that relaxing determinism deprives arithmetic circuits from the ability to compute MPE in linear time. We also add a new result showing that enforcing decomposability has the power of solving MPE, even though the MPE query is not tractable for decomposable circuits. Moreover, we show that relaxing determinism leads to a type of incompleteness that we call parametric incompleteness, with important implications on the compilability of circuits from models. Our final contribution is a formal correctness proof of the linear-time MPE algorithm, originally proposed by (Chan & Darwiche, 2006), but with respect to the reconstructed definition of arithmetic circuits satisfying decomposability, determinism and smoothness.
This paper is structured as follows. We reconstruct the definition of arithmetic circuits as given by (Darwiche, 2002, 2003) in Section 2, but with respect to factors instead of distributions (of Bayesian networks). We then provide a new treatment of decomposability and smoothness in Section 3, followed by a new treatment of determinism in Section 4. We finally focus on the relaxation of determinism in Section 5, where we provide a new set of results and insights.
2 Arithmetic Circuits
Capital letters () denote variables and lower-case letters () denote their values. Bold capital letters () denote sets of variables and bold lower-case letters () denote their instantiations. Value is compatible with instantiation iff assigns value to or does not assign any value to .
A factor over variables maps each instantiation of variables into a non-negative number . The factor is a distribution when .
The classical, tabular representation of a factor is clearly exponential in the number of variables , yet it allows one to answer key probabilistic queries efficiently. The interest here is in a more compact representation of these factors, using arithmetic circuits, while preserving the ability to answer some of these queries efficiently. We focus on the following queries, all with respect to a factor , with its variables partitioned into sets and :
Computing the value of factor at instantiation , defined as and called a marginal in this paper. This corresponds to the probability of evidence when the factor is a distribution.
Computing the MPE of factor , defined as . This corresponds to the most likely instantiation when the factor is a distribution.
Computing the MAP over variables , defined as . This is the most likely state of variables when the factor is a distribution.
For Bayesian networks (interpreted as factors), the decision variants of the MPE, marginals, and MAP problems are, respectively, -complete (Shimony, 1994), -complete (Roth, 1996), and -complete (Park & Darwiche, 2004); see also (Darwiche, 2009). Hence, computing marginals is more difficult than computing MPE—an observation that will be quite relevant later.
We also need to define the projection of factor on variables as the factor with . This projection will be denoted by .
We next define an arithmetic circuit over discrete variables , as utilized in (Darwiche, 2002, 2003) to represent distributions, except that we will utilize it to represent factors. A key observation here is that the circuit inputs are not variables , but indicator variables that are derived from the values of variables (Darwiche, 2002, 2003).
An arithmetic circuit over variables is a rooted DAG whose internal nodes are labeled with or and whose leaf nodes are labeled with either indicator variables or non-negative parameters . Here, is the value of some variable in . The value of the circuit at instantiation , where , is denoted and obtained by assigning indicators the value if is compatible with instantiation and otherwise, then evaluating the circuit in the standard way (in linear time).
The following definition makes a distinction that has not been made explicit in the literature as far as we know, but is critical for a clear semantics of arithmetic circuits.
The circuit computes factor iff for each instantiation of variables . The circuit computes the factor marginals iff for each instantiation of every .
The notion of “computes a factor” constrains the value of an arithmetic circuit under a strict subset of its inputs (i.e., those corresponding to complete instantiations). However, the notion of “computes marginals” constrains its value under every input. Hence, two arithmetic circuits that represent distinct functions (over indicator variables) may still compute the same factor. Consider an arithmetic circuit that computes a factor , where has values and . Replacing with in this circuit preserves its ability to compute the factor since for every input that is relevant to computing the factor. This replacement, however, will change the function represented by the circuit and its ability to compute the factor marginals.
An arithmetic circuit that computes the marginals of a factor also computes the factor. However, an arithmetic circuit that computes a factor does not necessarily compute its marginals.
Consider the following arithmetic circuit which computes the factor in Figure 1(c):
This circuit does not compute the factor marginals. Moreover, this circuit is the product of two circuits, one computing factor , the other computing factor , as in Figure 1.
To get further insights into the notion of “computing marginals,” we appeal to the notion of a network polynomial (Darwiche, 2003), while lifting it to factors.
The polynomial of factor is defined as:
where means that the value of variable is compatible with instantiation of variables .
The polynomial of factor in Figure 1(c) is . The polynomial of factor corresponds to the simplest circuit that computes the factor marginals. It is a two-level circuit though, which has an exponential size. The interest, however, is in deeper circuits that may not be exponentially sized. We later discuss circuit properties that allows us to achieve this, sometimes.
One can construct an arithmetic circuit that computes the distribution of a Bayesian network or the partition function of a Markov network in time and space that are linear in the size of these models. Each of these models correspond to a set of factors , with the model representing the product of these factors. We can construct a circuit that computes each factor as given in Definition 4, then simply combine these circuits using a multiplication node. The result will compute the factor but it will not necessarily compute its marginals. We next show that if we enforce the properties of decomposability and smoothness on such a circuit, while maintaining its ability to compute the factor , the resulting circuit will also compute the factor marginals. Therefore, these two properties turn the circuit into a tractable representation of the factor, allowing one to compute marginals by simply evaluating the circuit as in Definition 2 (in time linear in the circuit size).
3 Decomposability and Smoothness
The property of decomposability (Darwiche, 2001b) was used for tractable probabilistic reasoning in (Darwiche, 2003) by compiling Bayesian networks into arithmetic circuits that are guaranteed to be decomposable. This property was also enforced by the algorithm proposed in (Lowd & Domingos, 2008) for learning arithmetic circuits.
Definition 5 (Decomposability)
Let be a node in an arithmetic circuit . The variables of , denoted , are all variables with some indicator appearing at or under node . An arithmetic circuit is decomposable iff every pair of children and of a -node satisfies .
The property of smoothness (Darwiche, 2001b) was also used for probabilistic reasoning in (Darwiche, 2003) by compiling circuits that are smooth. It was also enforced by the learning algorithm of (Lowd & Domingos, 2008). This property was later called completeness in the works on SPNs, initially in (Poon & Domingos, 2011).
Definition 6 (Smoothness)
An arithmetic circuit is smooth iff (1) it contains at least one indicator for each variable in , and (2) for every child of -node , we have .
Consider a factor , where variable is binary and . A circuit that consists of the single parameter will compute this factor but is not smooth. The circuit computes this factor and is smooth.
Consider a variable with values . Multiplying a circuit node by preserves the circuit’s ability to compute a given factor since under any circuit input that is relevant to this computation. One can use this technique to ensure the smoothness of any circuit, while incurring only a polynomial overhead.111(Darwiche, 2001a) shows how to smooth an NNF circuit in space and time, where is the size of the circuit and is the number of variables (the method can be adapted to ACs). Hence, contrary to decomposability and determinism, enforcing smoothness is not difficult computationally, yet it is necessary for an arithmetic circuit to compute marginals as we discuss later. We also state the following observation, used extensively in inductive proofs that we utilize later.
Consider a decomposable and smooth arithmetic circuit and define for each circuit node . Each arithmetic circuit rooted at node is also decomposable and smooth.
A main insight in this paper is the use of subcircuits, first introduced in (Chan & Darwiche, 2006) for a different purpose. They were also adopted in (Dennis & Ventura, 2015; Zhao et al., 2016) to motivate SPN learning algorithms.
Definition 7 (Subcircuits)
A complete subcircuit of an arithmetic circuit is obtained by traversing the circuit top-down, while choosing one child of each visited -node and all children of each visited -node. The term of is the set of values for which indicator appears in . The coefficient of is the product of all parameters in .
The circuit computes factor with and . It is decomposable, smooth and has three complete subcircuits, with , and as their term/coefficient pairs. Note that two subcircuits may have the same term but different coefficients.
The following lemma and its proof reveal the precise roles of decomposability and smoothness. Given decomposability, the term of a complete subcircuit will not contain conflicting values for any variable. Given smoothness, the term must contain a value for each variable.
Let be a complete subcircuit of an arithmetic circuit that is decomposable and smooth. The term of subcircuit must be an instantiation of variables .
Given smoothness, every variable must have at least one indicator in (no variables are dropped from the circuit if we keep only a single child of a -node). Given decomposability, each variable must have at most one indicator in . Hence, will contain exactly one indicator for each variable . The term of is therefore an instantiation of variable .
A complete subcircuit with term will be called an -subcircuit. Figure 2 depicts an -subcircuit (in red) and an -subcircuit (in blue).
In a decomposable and smooth circuit , every complete subcircuit is an -subcircuit for some instantiation of variables . The circuit can then be treated as a collection of -subcircuits (multiple subcircuits can have the same term). Our proofs utilize this implication heavily.
An input for arithmetic circuit assigns a value in to each circuit indicator . An instantiation is compatible with a circuit input , denoted , iff the input sets when sets .
A circuit input can be viewed as the set of instantiations compatible with it. Consider the binary variablesfor an example. The circuit input
has a single compatible instantiation . The input
has no compatible instantiations, and the circuit input:
has two compatible instantiations and . In this latter case, evaluating the circuit at instantiation , as discussed in Definition 2, leads to evaluating it under input .
The following lemma brings us one step away from showing why decomposability and smoothness force an AC that computes a factor to also compute the factor marginals.
Given a decomposable and smooth arithmetic circuit, let be the coefficients of complete subcircuits whose terms are compatible with circuit input . The circuit will evaluate to under input .
Given Lemma 1, we will use induction on the circuit structure. The base case is a leaf circuit node (indicator or parameter). The lemma holds trivially in this case. The inductive case is when is an internal circuit node with children . Suppose the lemma hold for these children. If is a -node, the lemma holds for by decomposability (the complete subcircuits of correspond to the Cartesian product of complete subcircuits for its children). If is a -node, the lemma holds for since the complete subcircuits of correspond to the union of complete subcircuits of its children.
Let be the coefficients of -subcircuits in a decomposable and smooth arithmetic circuit . We then have .
We are now ready for the key result we are after.
Consider an arithmetic circuit that computes factor . If the circuit is decomposable and smooth, then it also computes the marginals of factor ).
Consider an instantiation of some variables , let be all instantiations of variables that are compatible with , and let be the circuit input corresponding to these instantiations. Let be the sum of coefficients of all -subcircuits. Since the circuit computes factor , we have and, hence, by Corollary 2. By Lemma 3, the circuit evaluates to under input , which is . Hence, the circuit computes the factor marginals.
This theorem justifies the standard algorithm for computing marginals on arithmetic circuits, in linear time, as proposed in (Darwiche, 2003)—that is, by simply evaluating the circuit as in Definition 2. In that work, however, the property of determinism was also assumed (discussed in the next section). Determinism is not necessary though for computing marginals as initially observed in (Poon & Domingos, 2011).222(Poon & Domingos, 2011) introduced sum-product networks (SPNs), which are equivalent to decomposable and smooth ACs. More precisely, each can be converted into the other in linear time and space (Rooshenas & Lowd, 2014). The conversion is straightforward and amounts to adjusting for graphical notation. Our proof above uses different tools than those used in (Poon & Domingos, 2011) and is set in a more general context. Moreover, these tools and associated lemmas turn out to be essential for the rest of our treatment on the role of determinism, which we discuss in the next section.
As for the necessity of smoothness, consider the circuits and Both circuits are decomposable and compute the same factor: , , and . However, circuit is not smooth while is smooth. Only is guaranteed to compute factor marginals by Theorem 1. For example, evaluating at instantiation gives according to Definition 2, while .333Theorem 1 of (Friesen & Domingos, 2016) implies that factor marginals can be computed in time linear in the size of an arithmetic circuit, when the circuit is decomposable but not smooth. This complexity is not justified (but assumed) in the proof of the theorem. In fact, we are unaware of any justified algorithm that attains this complexity without smoothness; see also Footnote 1.
The property of determinism (Darwiche, 2001a) was employed for probabilistic reasoning in (Darwiche, 2003) by compiling Bayesian networks into arithmetic circuits that are deterministic. It was also enforced by the algorithm of (Lowd & Domingos, 2008) for learning arithmetic circuits. The property was later called selectivity in the works on SPNs, initially in (Peharz et al., 2014).
Using the terminology of our current formulation, the original definition of determinism would amount to this: An arithmetic circuit is deterministic iff the terms of each two of its complete subcircuits are conflicting. We will adopt a weaker definition, which allows conflicting subcircuits as long as at most one of them has a non-zero coefficient.
Definition 9 (Determinism)
An arithmetic circuit is deterministic iff each -node has at most one non-zero input when the circuit is evaluated under any instantiation of variables .
As mentioned earlier, the original proposal for using arithmetic circuits as a tractable representation of probability distributions (Darwiche, 2003) ensured that these circuits are deterministic, in addition to being decomposable and smooth. Moreover, several methods were proposed in (Darwiche, 2003) for compiling Bayesian networks into ACs with these properties. One of these methods ensures that the size of the AC is proportional to the size of a jointree for the network. Another method yields circuits that can sometimes be exponentially smaller, and is implemented in the publicly available system (Chavira & Darwiche, 2008); see also (Darwiche et al., 2008) for an empirical evaluation of this system in one of the UAI inference evaluations.
While determinism is not needed to compute factor marginals, it is needed for the correctness of the linear-time MPE algorithm of (Chan & Darwiche, 2006). This was missed in some earlier works (Poon & Domingos, 2011), which used this algorithm on non-deterministic ACs (i.e., SPNs) without realizing that it is no longer correct. This oversight was noticed in later works (Peharz et al., 2016; Mauá & de Campos, 2017).444(Peharz et al., 2016) proposed a polytime algorithm that converts an SPN into one that is deterministic and smooth (called an augmented SPN), but this new SPN computes a different factor than the one computed by the original SPN. Hence, its MPEs cannot be generally converted into MPEs of the original SPN. We next reveal the reason why computing MPE without determinism is hard. Later in the section, we reveal the reason why the MPE algorithm of (Chan & Darwiche, 2006) fails without determinism.
The key observation is this. Consider variables which are partitioned into and . Given a decomposable and smooth arithmetic circuit that computes factor , one can obtain in linear time a decomposable and smooth that computes the projection . This is achieved by simply setting all indicators to ; see (Darwiche, 2001b) for the root of this observation. Moreover, an MPE for the projection is a MAP for the original factor
. Hence, a polytime MPE algorithm implies a polytime MAP algorithm on decomposable and smooth ACs. We know, however, that Naive Bayes networks have linear-size decomposable and smooth ACs, while MAP is hard on these networks(de Campos, 2011). Therefore, the existence of a polytime MPE algorithm on such circuits will contradict standard complexity assumptions. These observations can be abstracted into the following lemma, which succinctly and intuitively explains why MPE is not tractable on decomposable and smooth circuits.
A circuit representation that supports projection and MPE in polytime also supports MAP in polytime.
Note that deterministic, decomposable and smooth ACs do not support projection in polytime so the above argument does not apply in this case (setting indicators to will generally destroy determinism).
More formally, let be a decomposable and smooth arithmetic circuit that computes a factor . For a given value , consider the decision problems:
D-MPE-AC: Is there an instantiation where ?
D-MAP-AC: Is there an instantiation where ? ( is partitioned into and ).
We now have the following result, whose proof expands the one given in (Peharz et al., 2016) for SPNs based on the above observations; see also (Mauá & de Campos, 2017) for an in-depth discussion of MPE hardness on SPNs.
The problem D-MPE-AC is NP-complete.
Given instantiation and value , we can test whether by evaluating the circuit in time linear in the size of the circuit. Hence, the problem is in NP. To show NP-hardness, we reduce the (decision) problem of computing (partial) MAP in a naive Bayes network, which is NP-complete (de Campos, 2011), to MPE in a decomposable and smooth arithmetic circuit. Suppose we have a naive Bayes network with a root node and leaf nodes , and inducing a distribution . We can compile this network into a polysize decomposable, deterministic and smooth arithmetic circuit that computes , e.g., as in (Chavira & Darwiche, 2008). We can sum-out variable in the circuit by setting the indicators of to one. The resulting circuit is decomposable and smooth, and computes the (marginals of) factor . For a given value , there exists an instantiation where iff there exists an instantiation where , which is an NP-complete problem (de Campos, 2011).
The problem D-MAP-AC is NP-complete.
The following lemma reveals the precise role of determinism, which stands behind the correctness of the linear-time MPE algorithm of (Chan & Darwiche, 2006). It basically shows a one-to-one correspondence between the non-zero rows of the factor computed by a circuit and the complete subcircuits with non-zero coefficients.
Consider an arithmetic circuit that computes factor and is deterministic, decomposable and smooth (hence, can be viewed as a collection of -subcircuits). For each instantiation , we have:
If the circuit has two distinct -subcircuits, one of them must have a zero coefficient.
If , the circuit contains a unique -subcircuit with coefficient .
To prove (a), suppose the circuit contains two distinct -subcircuits and that have non-zero coefficients. We will now establish a contradiction. Since and are distinct, each must include a distinct child of some -node in the circuit. If we evaluate the circuit at instantiation , both and will have non-zero values. Hence, the circuit cannot be deterministic, which is a contradiction. To prove (b), suppose and let be all -subcircuits. At most one can have a non-zero coefficient by (a). Since the circuit computes the factor, it must evaluate to under instantiation . Hence, exactly one has as its coefficient.
Lemma 5 allows us to prove the correctness of the MPE algorithm given by (Chan & Darwiche, 2006) under the more general setting we have in this paper. This original algorithm is based on converting a deterministic, decomposable and smooth AC that computes a distribution into a maximizer circuit. Evaluating this circuit under evidence , as in Definition 2, gives the MPE value .
An arithmetic circuit is converted into a maximizer circuit, denoted , by replacing every -node with a -node. The complete subcircuits of are defined as in Definition 7, but where exactly one child of each visited -node is selected.
Let be a deterministic, decomposable and smooth arithmetic circuit that computes a factor and let be its maximizer circuit. Then for .
By Lemma 5, there is a one-to-one correspondence between the non-zero rows of factor and -subcircuits with non-zero coefficients. Let be the coefficients of -subcircuits, where is compatible with . Hence, . That is, the MPE value is a coefficient of some -subcircuit—call it an MPE-subcircuit. We will think of the algorithm as composing an MPE-subcircuit in addition to computing its coefficient and show that by induction on the circuit structure (see Lemma 1). The base case trivially holds for leaf circuit nodes (indicators and parameters). Assume is an internal circuit node and the above equality holds for its children having MPE-subcircuits and coefficient . If is a -node, then by decomposability, an MPE-subcircuit for can be found by joining with as its coefficient. If is a -node, then by determinism, an MPE-subcircuit for can be found from the with the largest with as its coefficient.
Once a maximizer circuit is evaluated to , one can identify an -subcircuit that has as its coefficient, with being an MPE instantiation; see (Chan & Darwiche, 2006).555Smoothness is not strictly needed for this algorithm, except that it ensures that a full variable instantiation is returned.
Without determinism, a circuit may have multiple -subcircuits for a given , each having a non-zero coefficient. By Corollary 2, the value of , , is the sum of these coefficients. An MPE algorithm that does not perform this sum cannot be correct.666This MPE algorithm was used on selective SPNs (equivalent to deterministic and decomposable ACs) in (Peharz et al., 2016). It was also adapted to algebraic model counting (AMC) in (Kimmig et al., 2016) and to Sum-Product Functions (SPFs) in (Friesen & Domingos, 2016). Determinism was not required in (Kimmig et al., 2016). This is sound since AMC problems correspond to Boolean circuits where the weight of an instantiation is a product of literal weights, and is independent of how many times the instantiation appears as a subcircuit.
Before we further discuss the impact of relaxing determinism, we point to a new class of arithmetic circuits, the Probabilistic Sentential Decision Diagram (PSDD) (Kisa et al., 2014), which imposes stronger versions of decomposability and determinism. This enables the multiplication of two ACs in polytime, which is otherwise hard under the standard versions of these properties (Shen et al., 2016).
5 The Impact of Relaxing Determinism
We now consider two new implications of relaxing determinism, one positive and one negative. We also address an apparent paradox: How could a representation (decomposable and smooth ACs) allow the computation of marginals easily (a PP-complete problem), yet not allow the computation of MPE easily (an NP-complete problem)? Recall that the complexity class NP is included in the class PP.
The positive implication is that relaxing determinism can lead to exponentially smaller arithmetic circuits.
Theorem 4 (Separation)
There is a family of factors where (1) there exists a decomposable and smooth arithmetic circuit that computes the marginals of , with a size polynomial in ; (2) every deterministic, decomposable and smooth circuit that computes the marginals of factor must have a size exponential in .
(Bova et al., 2016) identifies a family of Boolean functions (the Sauerhoff functions) that have decomposable NNFs (DNNFs) with sizes polynomial in but where their deterministic DNNFs (d-DNNFs) must have sizes exponential in . Previously known separations were conditional on the polynomial hierarchy not collapsing (Darwiche & Marquis, 2002), but (Bova et al., 2016) does not make such an assumption (and neither do we).
Let denote a polysize DNNF for function and let denote the polysize decomposable and smooth arithmetic circuit obtained by: replacing the inputs of with the corresponding indicator variables, replacing conjunctions and disjunctions by products and sums, respectively, then smoothing if necessary. The resulting arithmetic circuit has a positive value (possibly ) on input iff the original function evaluates to true. We now show that if is the factor computed by arithmetic circuit , then any deterministic, decomposable and smooth AC that computes must have an exponential size.
Let be such a circuit. Consider the d-DNNF obtained by: replacing the indicator variables with the corresponding literals of variables , replacing products and sums with conjunctions and disjunctions, respectively, and by replacing positive parameters with true and zero parameters with false. Note that is true iff , i.e., a complete subcircuit for evaluates to true iff the corresponding subcircuit for has a positive coefficient. Hence, if had a sub-exponential size, then function would have a sub-exponentially sized d-DNNF, which we know does not exist (Bova et al., 2016).
We now get to a newly identified, negative implication of relaxing determinism. It pertains to compiling ACs from probabilistic models and requires the following notion.
A set of parameters is complete for factor iff for every instantiation , the parameter can be expressed as a product of parameters in .
The parameters of a Bayesian network are complete for its distribution; those of a Markov network are complete for its partition function; and the parameters are complete for Boolean factors: with .
We will write to denote an arithmetic circuit whose parameters are in . The following theorem states a key property which is lost when relaxing determinism.
Theorem 5 (Completeness)
Consider factor and complete parameters . There must exist an arithmetic circuit that computes the factor marginals and is deterministic, decomposable and smooth.
Consider the factor polynomial in Definition 4 and replace each by a product of parameters from . The result can be represented by an AC that is deterministic, decomposable and smooth.
The standard methods for compiling Bayesian networks, and graphical models more generally, into arithmetic circuits do indeed limit the circuit parameters to those appearing in the model factors. Hence, the compilation process amounts only to finding a (small) circuit structure since the circuit parameters are already predetermined. As mentioned earlier, these methods can yield relatively small circuits for some graphical models with very high treewidth (Chavira & Darwiche, 2008; Darwiche et al., 2008).
The above property is lost if one insists on constructing arithmetic circuits that are decomposable and smooth, but not deterministic. This is shown in the following theorem, which refers to dead circuit nodes: ones that appear only in complete subcircuits that have zero coefficients.777Dead nodes can be replaced by the constant zero without changing the factor computed by the circuit. One can relax determinism trivially by adding dead nodes, but that does not help as far as obtaining smaller circuits.
Theorem 6 (Parametric Incompleteness)
Let be a Boolean factor and ( is complete for ). A circuit cannot compute if it is decomposable, smooth and free of dead nodes, but not deterministic.
If the AC has no -node, then it is vacuously deterministic. Otherwise, it has a -node. Since the circuit is not deterministic, there is a -node that violates determinism. This node is included in some complete subcircuit with a non-zero coefficient (otherwise, the node is dead). Since node violates determinism, we can find two distinct -subcircuits, with non-zero coefficients, that differ by the branch selected at node . Since the circuit computes factor , Lemma 3 implies that the coefficients of these -subcircuits must add up to . There must then exist an -subcircuit whose coefficient is in , exclusive, i.e., the circuit has a parameter not in .
In other words, if a decomposable and smooth circuit computes the marginals of a Boolean factor, it must also be non-trivially deterministic. This result has a major implication on compiling probabilistic graphical models into ACs that are not deterministic. That is, one cannot generally restrict the circuit parameters to those appearing in the model, otherwise a circuit may not exist.
Therefore, while relaxing determinism can lead to exponentially smaller circuits, finding these circuits is now more involved as it may require searching for parameters. This demands new techniques as all techniques we are aware of for compiling models into deterministic circuits assume that the circuit parameters come from model parameters.
Our last contribution relates to the following apparent paradox. Suppose we have a set of factors , representing a probabilistic graphical model that has a corresponding joint factor . Consider now the following decision problems, over such probabilistic graphical models, which correspond to computing the MPE and marginals:
D-MPE: Is there an instantiation where ?
D-PR: Is ?
D-MPE is NP-complete, whereas D-PR is PP-complete. Moreover, the complexity class PP includes NP. Yet, decomposable and smooth ACs allow one to compute marginals in linear time, while computing MPE, which is no harder, is hard on these circuits!
To resolve this apparent paradox, one must observe the sometimes subtle distinction between a representation and the computation needed to produce that representation. The representation here is decomposable and smooth ACs, and the computation is the algorithm used to compile a graphical model into this representation. While the representation itself does not facilitate the computation of MPE, the compilation algorithm must be sufficient to compute the MPE query without additional complexity (beyond polynomial). To formalize this, we need the following lemma.
D-MPE can be reduced to D-PR.
We now have the following result, which implies that a polytime compilation algorithm for decomposable and smooth ACs can be used as a sub-routine for a polytime algorithm for computing MPEs (which we do not expect to exist, under typical complexity theoretic assumptions).
Consider an algorithm that takes a set of factors as input and returns a decomposable and smooth arithmetic circuit that computes the marginals of factor . Let be the size of input factors and let be the time complexity of algorithm . One can compute the MPE of factor in time .
These findings highlight an interesting property of decomposable and smooth ACs. They “store” the results to an exponential number of marginal queries, where each result can be retrieved by a simple traversal of the circuit. Yet, they do not “store” the answers to MPE queries, even though these queries are easier. The implication of this can be seen from two angles, depending on whether these circuits are compiled from models or learned from data. In the former case, the compilation algorithm is readily available to answer MPE queries, but at the cost of invoking this algorithm for each query. In the latter case, however, answering MPE queries remains a challenge. Hence, learning circuits that are not deterministic needs to yield an additional benefit that compensates for this loss in tractability. This could be a simpler learning algorithm; a smaller learned circuit; or a learned circuit whose factor is superior from a statistical learning viewpoint.
This work has been partially supported by NSF grant #IIS-1514253, ONR grant #N00014-15-1-2339 and DARPA XAI grant #N66001-17-2-4032. We thank YooJung Choi, Umut Oztok, Yujia Shen, and Guy Van den Broeck for comments and discussions on this paper.
Appendix A Proofs
Given an instantiation and value , we can test whether by evaluating the circuit in time linear in the size of the circuit. Hence, the problem is in NP. To show the problem is NP-hard, we reduce the (decision) problem of computing (partial) MAP in a naive Bayes network, as in the proof of Theorem 2.
We first reduce D-MPE to satisfiability on a CNF (this is essentially an instance of Cook’s theorem). Satisfying assignments of the CNF correspond to solutions of the D-MPE query, which we can count using a D-PR query.
First, we construct a Boolean circuit that takes inputs , and outputs true if and false otherwise. We construct a (multiplexer) circuit for each factor , which has inputs and outputs a bitstring representing a bit encoding of the value (which we assume are rational values). We then construct a circuit that represents a multiplier, which takes as input the bitstrings and outputs another bitstring representing the product of . Finally, we have another circuit that takes the bitstring as input, and outputs true if this bitstring represents a value that is greater than , and false otherwise. Hence, the output of this circuit is true iff . Each one of the constructed circuits has size polynomial in the size of the inputs, i.e., the aggregate size of the factors and the number of bits needed to represent their values.
We can reduce this circuit to a CNF by adding auxiliary variables , using one new variable for the output of each gate, i.e., we reduce circuit satisfiability to 3-SAT; see, e.g., (Kleinberg & Tardos, 2006). This results in a set of Boolean factors . If , then iff , and iff there exists an input where .
Given factors of size , we first construct a set of factors of size , as in Lemma 6. We invoke algorithm on factors , obtaining a decomposable and smooth arithmetic circuit representing in time . The size of is also (the size of the circuit cannot be larger than the time needed to construct it). The same amount of time is required to evaluate the marginal of , hence the overall time to compute the MPE of factor is .
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