Microprocessor Optimizations for the Internet of Things
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The proliferation of connected low-power devices on the Internet of Things will result in a data explosion that will significantly increase data transmission costs with respect to energy consumption and latency. Edge computing reduces these costs by performing computations at the edge nodes prior to data transmission to interpret and/or utilize the data. While much research has focused on the IoT's connected nature and communication challenges, the challenges of IoT embedded computing with respect to device microprocessors and optimizations has received much less attention. This article explores IoT applications' execution characteristics from a microarchitectural perspective and the microarchitectural characteristics that will enable efficient and effective edge computing. To tractably represent a wide variety of next-generation IoT applications, we present a broad IoT application classification methodology based on application functions. Using this classification, we model and analyze the microarchitectural characteristics of a wide range of state-of-the-art embedded system microprocessors, and evaluate the microprocessors' applicability to IoT edge computing. Using these analysis as foundation, we discuss the tradeoffs of potential microarchitectural optimizations that will enable the design of right-provisioned microprocessors that are efficient, configurable, extensible, and scalable for next-generation IoT devices. Our work provides insights into the impacts of microarchitectural characteristics on microprocessors' energy consumption, performance, and efficiency for various IoT application execution requirements. Our work also provides a foundation for the analysis and design of a diverse set of microprocessor architectures for edge computing in next-generation IoT devices.
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