Meta-level issues in Offloading: Scoping, Composition, Development, and their Automation

by   André DeHon, et al.

This paper argues for an accelerator development toolchain that takes into account the whole system containing the accelerator. With whole-system visibility, the toolchain can better assist accelerator scoping and composition in the context of the expected workloads and intended performance objectives. Despite being focused on the 'meta-level' of accelerators, this would build on existing and ongoing DSLs and toolchains for accelerator design. Basing this on our experience in programmable networking and reconfigurable-hardware programming, we propose an integrative approach that relies on three activities: (i) generalizing the focus of acceleration to offloading to accommodate a broader variety of non-functional needs – such as security and power use – while using similar implementation approaches, (ii) discovering what to offload, and to what hardware, through semi-automated analysis of a whole system that might compose different offload choices that changeover time, (iii) connecting with research and state-of-the-art approaches for using domain-specific languages (DSLs) and high-level synthesis (HLS) systems for custom offload development. We outline how this integration can drive new development tooling that accepts models of programs and resources to assist system designers through design-space exploration for the accelerated system.



page 1

page 2

page 3


Shire: Making FPGA-accelerated Middlebox Development More Pleasant

We introduce an approach to designing FPGA-accelerated middleboxes that ...

High-Level Synthesis of Security Properties via Software-Level Abstractions

High-level synthesis (HLS) is a key component for the hardware accelerat...

Predictable Accelerator Design with Time-Sensitive Affine Types

Field-programmable gate arrays (FPGAs) provide an opportunity to co-desi...

TensorLib: A Spatial Accelerator Generation Framework for Tensor Algebra

Tensor algebra finds applications in various domains, and these applicat...

Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification

Modern Systems-on-Chip (SoC) designs are increasingly heterogeneous and ...

Enabling Cross-Domain Communication: How to Bridge the Gap between AI and HW Engineers

A key issue in system design is the lack of communication between hardwa...

User-Space Emulation Framework for Domain-Specific SoC Design

In this work, we propose a portable, Linux-based emulation framework to ...
This week in AI

Get the week's most popular data science and artificial intelligence research sent straight to your inbox every Saturday.