MashUp: Scaling TCAM-based IP Lookup to Larger Databases by Tiling Trees
share
Ternary content addressable memories (TCAMs) are commonly used to implement IP lookup, but suffer from high power and area costs. Thus TCAM included in modern chips is limited and can support moderately large datasets in data centers and enterprises, but fails to scale to backbone WAN databases of millions of prefixes. IPv6 deployment also makes it harder to deploy TCAMs because of the larger prefixes used in the 128-bit address space. While the combination of algorithmic techniques and TCAM has been proposed before for reducing power consumption or update costs(e.g., CoolCAM [32] and TreeCAM [28]), we focus on reducing TCAM bits using a scheme we call MashUp that can easily be implemented in modern reconfigurable pipeline chips such as Tofino-3. MashUp uses a new technique, tiling trees, which takes into account TCAM grain (tile) sizes. When applied to a publicly available IPv6 dataset using Tofino-3 TCAM grain sizes (44 by 512), there was a 2X reduction in TCAM required. Further, if we mix TCAM and SRAM using a new technique we call node hybridization, MashUp decreases TCAM bits by 4.5X for IPv6, and by 7.5X for IPv4, allowing wide area databases of 900,000 prefixes to be supported by Tofino-3 and similar chips
READ FULL TEXT
