Logic Programming approaches for routing fault-free and maximally-parallel Wavelength Routed Optical Networks on Chip (Application paper)

07/18/2017
by   Marco Gavanelli, et al.
0

One promising trend in digital system integration consists of boosting on-chip communication performance by means of silicon photonics, thus materializing the so-called Optical Networks-on-Chip (ONoCs). Among them, wavelength routing can be used to route a signal to destination by univocally associating a routing path to the wavelength of the optical carrier. Such wavelengths should be chosen so to minimize interferences among optical channels and to avoid routing faults. As a result, physical parameter selection of such networks requires the solution of complex constrained optimization problems. In previous work, published in the proceedings of the International Conference on Computer-Aided Design, we proposed and solved the problem of computing the maximum parallelism obtainable in the communication between any two endpoints while avoiding misrouting of optical signals. The underlying technology, only quickly mentioned in that paper, is Answer Set Programming (ASP). In this work, we detail the ASP approach we used to solve such problem. Another important design issue is to select the wavelengths of optical carriers such that they are spread across the available spectrum, in order to reduce the likelihood that, due to imperfections in the manufacturing process, unintended routing faults arise. We show how to address such problem in Constraint Logic Programming on Finite Domains (CLP(FD)). This paper is under consideration for possible publication on Theory and Practice of Logic Programming.

READ FULL TEXT

page 1

page 2

page 3

page 4

research
05/10/2017

Solving Distributed Constraint Optimization Problems Using Logic Programming

This paper explores the use of Answer Set Programming (ASP) in solving D...
research
03/19/2020

Train Scheduling with Hybrid Answer Set Programming

We present a solution to real-world train scheduling problems, involving...
research
12/16/2021

DeFT: A Deadlock-Free and Fault-Tolerant Routing Algorithm for 2.5D Chiplet Networks

By interconnecting smaller chiplets through an interposer, 2.5D integrat...
research
05/14/2014

The Design of the Fifth Answer Set Programming Competition

Answer Set Programming (ASP) is a well-established paradigm of declarati...
research
06/19/2020

Design of a Near-Ideal Fault-Tolerant Routing Algorithm for Network-on-Chip-Based Multicores

With relentless CMOS technology downsizing Networks-on-Chips (NoCs) are ...
research
07/10/2019

AWG-based Nonblocking Shuffle-Exchange Networks

Optical shuffle-exchange networks (SENs) have wide application in differ...
research
02/24/2022

Demonstrating BrainScaleS-2 Inter-Chip Pulse-Communication using EXTOLL

The BrainScaleS-2 (BSS-2) Neuromorphic Computing System currently consis...

Please sign up or login with your details

Forgot password? Click here to reset