1 Introduction
Neural networks have revolutionized many areas of machine intelligence, enabling superhuman accuracy for challenging image recognition tasks. However, the drive to improve accuracy often comes at a cost: modern state of the art networks require high computational resources beyond the capabilities of many mobile and embedded applications.
This paper introduces a new neural network architecture that is specifically tailored for mobile and resource constrained environments. Our network pushes the state of the art for mobile tailored computer vision models, by significantly decreasing the number of operations and memory needed while retaining the same accuracy.
Our main contribution is a novel layer module: the inverted residual with linear bottleneck. This module takes as an input a lowdimensional compressed representation which is first expanded to high dimension and filtered with a lightweight depthwise convolution. Features are subsequently projected back to a lowdimensional representation with a linear convolution
. The official implementation is available as part of TensorFlowSlim model library in
[4].This module can be efficiently implemented using standard operations in any modern framework and allows our models to beat state of the art along multiple performance points using standard benchmarks. Furthermore, this convolutional module is particularly suitable for mobile designs, because it allows to significantly reduce the memory footprint needed during inference by never fully materializing large intermediate tensors. This reduces the need for main memory access in many embedded hardware designs, that provide small amounts of very fast software controlled cache memory.
2 Related Work
Tuning deep neural architectures to strike an optimal balance between accuracy and performance has been an area of active research for the last several years. Both manual architecture search and improvements in training algorithms, carried out by numerous teams has lead to dramatic improvements over early designs such as AlexNet [5], VGGNet [6], GoogLeNet [7]. , and ResNet [8]. Recently there has been lots of progress in algorithmic architecture exploration included hyperparameter optimization [9, 10, 11] as well as various methods of network pruning [12, 13, 14, 15, 16, 17] and connectivity learning [18, 19]. A substantial amount of work has also been dedicated to changing the connectivity structure of the internal convolutional blocks such as in ShuffleNet [20] or introducing sparsity [21] and others [22].
, opened up a new direction of bringing optimization methods including genetic algorithms and reinforcement learning to architectural search. However one drawback is that the resulting networks end up very complex. In this paper, we pursue the goal of developing better intuition about how neural networks operate and use that to guide the simplest possible network design. Our approach should be seen as complimentary to the one described in
[23] and related work. In this vein our approach is similar to those taken by [20, 22] and allows to further improve the performance, while providing a glimpse on its internal operation. Our network design is based on MobileNetV1 [27]. It retains its simplicity and does not require any special operators while significantly improves its accuracy, achieving state of the art on multiple image classification and detection tasks for mobile applications.3 Preliminaries, discussion and intuition
3.1 Depthwise Separable Convolutions
Depthwise Separable Convolutions are a key building block for many efficient neural network architectures [27, 28, 20] and we use them in the present work as well. The basic idea is to replace a full convolutional operator with a factorized version that splits convolution into two separate layers. The first layer is called a depthwise convolution, it performs lightweight filtering by applying a single convolutional filter per input channel. The second layer is a convolution, called a pointwise convolution, which is responsible for building new features through computing linear combinations of the input channels.
Standard convolution takes an input tensor , and applies convolutional kernel to produce an output tensor . Standard convolutional layers have the computational cost of .
Depthwise separable convolutions are a dropin replacement for standard convolutional layers. Empirically they work almost as well as regular convolutions but only cost:
(1) 
which is the sum of the depthwise and pointwise convolutions. Effectively depthwise separable convolution reduces computation compared to traditional layers by almost a factor of ^{1}^{1}1more precisely, by a factor . MobileNetV2 uses ( depthwise separable convolutions) so the computational cost is to times smaller than that of standard convolutions at only a small reduction in accuracy [27].
3.2 Linear Bottlenecks
Consider a deep neural network consisting of layers each of which has an activation tensor of dimensions . Throughout this section we will be discussing the basic properties of these activation tensors, which we will treat as containers of “pixels” with dimensions. Informally, for an input set of real images, we say that the set of layer activations (for any layer ) forms a “manifold of interest”. It has been long assumed that manifolds of interest in neural networks could be embedded in lowdimensional subspaces. In other words, when we look at all individual channel pixels of a deep convolutional layer, the information encoded in those values actually lie in some manifold, which in turn is embeddable into a lowdimensional subspace^{2}^{2}2
Note that dimensionality of the manifold differs from the dimensionality of a subspace that could be embedded via a linear transformation.
.At a first glance, such a fact could then be captured and exploited by simply reducing the dimensionality of a layer thus reducing the dimensionality of the operating space. This has been successfully exploited by MobileNetV1 [27] to effectively trade off between computation and accuracy via a width multiplier parameter, and has been incorporated into efficient model designs of other networks as well [20]
. Following that intuition, the width multiplier approach allows one to reduce the dimensionality of the activation space until the manifold of interest spans this entire space. However, this intuition breaks down when we recall that deep convolutional neural networks actually have nonlinear per coordinate transformations, such as
. For example, applied to a line in 1D space produces a ’ray’, where as in space, it generally results in a piecewise linear curve with joints.It is easy to see that in general if a result of a layer transformation has a nonzero volume , the points mapped to are obtained via a linear transformation
of the input, thus indicating that the part of the input space corresponding to the full dimensional output, is limited to a linear transformation. In other words, deep networks only have the power of a linear classifier on the nonzero volume part of the output domain. We refer to supplemental material for a more formal statement.
On the other hand, when collapses the channel, it inevitably loses information in that channel. However if we have lots of channels, and there is a a structure in the activation manifold that information might still be preserved in the other channels. In supplemental materials, we show that if the input manifold can be embedded into a significantly lowerdimensional subspace of the activation space then the transformation preserves the information while introducing the needed complexity into the set of expressible functions.
To summarize, we have highlighted two properties that are indicative of the requirement that the manifold of interest should lie in a lowdimensional subspace of the higherdimensional activation space:

If the manifold of interest remains nonzero volume after transformation, it corresponds to a linear transformation.

is capable of preserving complete information about the input manifold, but only if the input manifold lies in a lowdimensional subspace of the input space.
These two insights provide us with an empirical hint for optimizing existing neural architectures: assuming the manifold of interest is lowdimensional we can capture this by inserting linear bottleneck layers into the convolutional blocks. Experimental evidence suggests that using linear layers is crucial as it prevents nonlinearities from destroying too much information. In Section 6, we show empirically that using nonlinear layers in bottlenecks indeed hurts the performance by several percent, further validating our hypothesis^{3}^{3}3We note that in the presence of shortcuts the information loss is actually less strong.. We note that similar reports where nonlinearity was helped were reported in [29] where nonlinearity was removed from the input of the traditional residual block and that lead to improved performance on CIFAR dataset.
For the remainder of this paper we will be utilizing bottleneck convolutions. We will refer to the ratio between the size of the input bottleneck and the inner size as the expansion ratio.
3.3 Inverted residuals
and inverted residual. Diagonally hatched layers do not use nonlinearities. We use thickness of each block to indicate its relative number of channels. Note how classical residuals connects the layers with high number of channels, whereas the inverted residuals connect the bottlenecks. Best viewed in color.
The bottleneck blocks appear similar to residual block where each block contains an input followed by several bottlenecks then followed by expansion [8]. However, inspired by the intuition that the bottlenecks actually contain all the necessary information, while an expansion layer acts merely as an implementation detail that accompanies a nonlinear transformation of the tensor, we use shortcuts directly between the bottlenecks. Figure 3 provides a schematic visualization of the difference in the designs. The motivation for inserting shortcuts is similar to that of classical residual connections: we want to improve the ability of a gradient to propagate across multiplier layers. However, the inverted design is considerably more memory efficient (see Section 5 for details), as well as works slightly better in our experiments.
Running time and parameter count for bottleneck convolution
The basic implementation structure is illustrated in Table 1. For a block of size , expansion factor and kernel size with input channels and output channels, the total number of multiply add required is . Compared with (1) this expression has an extra term, as indeed we have an extra convolution, however the nature of our networks allows us to utilize much smaller input and output dimensions. In Table 3 we compare the needed sizes for each resolution between MobileNetV1, MobileNetV2 and ShuffleNet.
3.4 Information flow interpretation
One interesting property of our architecture is that it provides a natural separation between the input/output domains of the building blocks (bottleneck layers), and the layer transformation – that is a nonlinear function that converts input to the output. The former can be seen as the capacity of the network at each layer, whereas the latter as the expressiveness. This is in contrast with traditional convolutional blocks, both regular and separable, where both expressiveness and capacity are tangled together and are functions of the output layer depth.
In particular, in our case, when inner layer depth is the underlying convolution is the identity function thanks to the shortcut connection. When the expansion ratio is smaller than , this is a classical residual convolutional block [8, 30]. However, for our purposes we show that expansion ratio greater than is the most useful.
This interpretation allows us to study the expressiveness of the network separately from its capacity and we believe that further exploration of this separation is warranted to provide a better understanding of the network properties.
4 Model Architecture
Now we describe our architecture in detail. As discussed in the previous section the basic building block is a bottleneck depthseparable convolution with residuals. The detailed structure of this block is shown in Table 1. The architecture of MobileNetV2 contains the initial fully convolution layer with filters, followed by residual bottleneck layers described in the Table 2. We use as the nonlinearity because of its robustness when used with lowprecision computation [27]. We always use kernel size
as is standard for modern networks, and utilize dropout and batch normalization during training.
With the exception of the first layer, we use constant expansion rate throughout the network. In our experiments we find that expansion rates between and result in nearly identical performance curves, with smaller networks being better off with slightly smaller expansion rates and larger networks having slightly better performance with larger expansion rates.
For all our main experiments we use expansion factor of applied to the size of the input tensor. For example, for a bottleneck layer that takes channel input tensor and produces a tensor with channels, the intermediate expansion layer is then channels.
Input  Operator  Output 

1x1 ,  
3x3 s=,  
linear 1x1 
channels, with stride
, and expansion factor .Input  Operator  

conv2d    32  1  2  
bottleneck  1  16  1  1  
bottleneck  6  24  2  2  
bottleneck  6  32  3  2  
bottleneck  6  64  4  2  
bottleneck  6  96  3  1  
bottleneck  6  160  3  2  
bottleneck  6  320  1  1  
conv2d 1x1    1280  1  1  
avgpool 7x7      1    
conv2d 1x1    k   
Size  MobileNetV1  MobileNetV2  ShuffleNet 
(2x,g=3)  
112x112  64/1600  16/400  32/800 
56x56  128/800  32/200  48/300 
28x28  256/400  64/100  400/600K 
14x14  512/200  160/62  800/310 
7x7  1024/199  320/32  1600/156 
1x1  1024/2  1280/2  1600/3 
max  1600K  400K  600K 
Tradeoff hyper parameters
As in [27] we tailor our architecture to different performance points, by using the input image resolution and width multiplier as tunable hyper parameters, that can be adjusted depending on desired accuracy/performance tradeoffs. Our primary network (width multiplier , ), has a computational cost of 300 million multiplyadds and uses 3.4 million parameters. We explore the performance trade offs, for input resolutions from to , and width multipliers of to . The network computational cost ranges from multiply adds to 585M MAdds, while the model size vary between 1.7M and 6.9M parameters.
One minor implementation difference, with [27] is that for multipliers less than one, we apply width multiplier to all layers except the very last convolutional layer. This improves performance for smaller models.
5 Implementation Notes
5.1 Memory efficient inference
The inverted residual bottleneck layers allow a particularly memory efficient implementation which is very important for mobile applications. A standard efficient implementation of inference that uses for instance TensorFlow[31]
or Caffe
[32], builds a directed acyclic compute hypergraph , consisting of edges representing the operations and nodes representing tensors of intermediate computation. The computation is scheduled in order to minimize the total number of tensors that needs to be stored in memory. In the most general case, it searches over all plausible computation orders and picks the one that minimizeswhere is the list of intermediate tensors that are connected to any of nodes, represents the size of the tensor and is the total amount of memory needed for internal storage during operation .
For graphs that have only trivial parallel structure (such as residual connection), there is only one nontrivial feasible computation order, and thus the total amount and a bound on the memory needed for inference on compute graph can be simplified:
(2) 
Or to restate, the amount of memory is simply the maximum total size of combined inputs and outputs across all operations. In what follows we show that if we treat a bottleneck residual block as a single operation (and treat inner convolution as a disposable tensor), the total amount of memory would be dominated by the size of bottleneck tensors, rather than the size of tensors that are internal to bottleneck (and much larger).
Bottleneck Residual Block
A bottleneck block operator shown in Figure 2(b) can be expressed as a composition of three operators , where is a linear transformation , is a nonlinear perchannel transformation: , and is again a linear transformation to the output domain: .
For our networks , but the results apply to any perchannel transformation. Suppose the size of the input domain is and the size of the output domain is , then the memory required to compute can be as low as .
The algorithm is based on the fact that the inner tensor can be represented as concatenation of tensors, of size each and our function can then be represented as
by accumulating the sum, we only require one intermediate block of size to be kept in memory at all times. Using we end up having to keep only a single channel of the intermediate representation at all times. The two constraints that enabled us to use this trick is (a) the fact that the inner transformation (which includes nonlinearity and depthwise) is perchannel, and (b) the consecutive nonperchannel operators have significant ratio of the input size to the output. For most of the traditional neural networks, such trick would not produce a significant improvement.
We note that, the number of multiplyadds operators needed to compute using way split is independent of , however in existing implementations we find that replacing one matrix multiplication with several smaller ones hurts runtime performance due to increased cache misses. We find that this approach is the most helpful to be used with being a small constant between and
. It significantly reduces the memory requirement, but still allows one to utilize most of the efficiencies gained by using highly optimized matrix multiplication and convolution operators provided by deep learning frameworks. It remains to be seen if special framework level optimization may lead to further runtime improvements.
6 Experiments
6.1 ImageNet Classification
Training setup
We train our models using TensorFlow[31]. We use the standard RMSPropOptimizer with both decay and momentum set to . We use batch normalization after every layer, and the standard weight decay is set to . Following MobileNetV1[27] setup we use initial learning rate of , and learning rate decay rate of
per epoch. We use 16 GPU asynchronous workers, and a batch size of
.Results
We compare our networks against MobileNetV1, ShuffleNet and NASNetA models. The statistics of a few selected models is shown in Table 4 with the full performance graph shown in Figure 5.
Network  Top 1  Params  MAdds  CPU 

MobileNetV1  70.6  4.2M  575M  113ms 
ShuffleNet (1.5)  71.5  3.4M  292M   
ShuffleNet (x2)  73.7  5.4M  524M   
NasNetA  74.0  5.3M  564M  183ms 
MobileNetV2  72.0  3.4M  300M  75ms 
MobileNetV2 (1.4)  74.7  6.9M  585M  143ms 
6.2 Object Detection
We evaluate and compare the performance of MobileNetV2 and MobileNetV1 as feature extractors [33] for object detection with a modified version of the Single Shot Detector (SSD) [34] on COCO dataset [2]. We also compare to YOLOv2 [35] and original SSD (with VGG16 [6] as base network) as baselines. We do not compare performance with other architectures such as FasterRCNN [36] and RFCN [37] since our focus is on mobile/realtime models.
SSDLite: In this paper, we introduce a mobile friendly variant of regular SSD. We replace all the regular convolutions with separable convolutions (depthwise followed by projection) in SSD prediction layers. This design is in line with the overall design of MobileNets and is seen to be much more computationally efficient. We call this modified version SSDLite. Compared to regular SSD, SSDLite dramatically reduces both parameter count and computational cost as shown in Table 5.
Params  MAdds  

SSD[34]  14.8M  1.25B 
SSDLite  2.1M  0.35B 
For MobileNetV1, we follow the setup in [33]. For MobileNetV2, the first layer of SSDLite is attached to the expansion of layer 15 (with output stride of 16). The second and the rest of SSDLite layers are attached on top of the last layer (with output stride of ). This setup is consistent with MobileNetV1 as all layers are attached to the feature map of the same output strides.
Both MobileNet models are trained and evaluated with Open Source TensorFlow Object Detection API [38]. The input resolution of both models is . We benchmark and compare both mAP (COCO challenge metrics), number of parameters and number of MultiplyAdds. The results are shown in Table 6. MobileNetV2 SSDLite is not only the most efficient model, but also the most accurate of the three. Notably, MobileNetV2 SSDLite is more efficient and smaller while still outperforms YOLOv2 on COCO dataset.
Network  mAP  Params  MAdd  CPU 

SSD300[34]  23.2  36.1M  35.2B   
SSD512[34]  26.8  36.1M  99.5B   
YOLOv2[35]  21.6  50.7M  17.5B   
MNet V1 + SSDLite  22.2  5.1M  1.3B  270ms 
MNet V2 + SSDLite  22.1  4.3M  0.8B  200ms 
6.3 Semantic Segmentation
In this section, we compare MobileNetV1 and MobileNetV2 models used as feature extractors with DeepLabv3 [39] for the task of mobile semantic segmentation. DeepLabv3 adopts atrous convolution [40, 41, 42], a powerful tool to explicitly control the resolution of computed feature maps, and builds five parallel heads including (a) Atrous Spatial Pyramid Pooling module (ASPP) [43] containing three convolutions with different atrous rates, (b) convolution head, and (c) Imagelevel features [44]. We denote by output_stride the ratio of input image spatial resolution to final output resolution, which is controlled by applying the atrous convolution properly. For semantic segmentation, we usually employ or for denser feature maps. We conduct the experiments on the PASCAL VOC 2012 dataset [3], with extra annotated images from [45]
and evaluation metric mIOU.
To build a mobile model, we experimented with three design variations: (1) different feature extractors, (2) simplifying the DeepLabv3 heads for faster computation, and (3) different inference strategies for boosting the performance. Our results are summarized in Table 7. We have observed that: (a) the inference strategies, including multiscale inputs and adding leftright flipped images, significantly increase the MAdds and thus are not suitable for ondevice applications, (b) using is more efficient than , (c) MobileNetV1 is already a powerful feature extractor and only requires about times fewer MAdds than ResNet101 [8] (e.g., mIOU: 78.56 vs 82.70, and MAdds: 941.9B vs 4870.6B), (d) it is more efficient to build DeepLabv3 heads on top of the second last feature map of MobileNetV2 than on the original lastlayer feature map, since the second to last feature map contains channels instead of , and by doing so, we attain similar performance, but require about times fewer operations than the MobileNetV1 counterparts, and (e) DeepLabv3 heads are computationally expensive and removing the ASPP module significantly reduces the MAdds with only a slight performance degradation. In the end of the Table 7, we identify a potential candidate for ondevice applications (in bold face), which attains mIOU and only requires B MAdds.
Network  OS  ASPP  MF  mIOU  Params  MAdds 

MNet V1  16  ✓  75.29  11.15M  14.25B  
8  ✓  ✓  78.56  11.15M  941.9B  
MNet V2*  16  ✓  75.70  4.52M  5.8B  
8  ✓  ✓  78.42  4.52M  387B  
MNet V2*  16  75.32  2.11M  2.75B  
8  ✓  77.33  2.11M  152.6B  
ResNet101  16  ✓  80.49  58.16M  81.0B  
8  ✓  ✓  82.70  58.16M  4870.6B 
6.4 Ablation study
Inverted residual connections. The importance of residual connection has been studied extensively [8, 30, 46]. The new result reported in this paper is that the shortcut connecting bottleneck perform better than shortcuts connecting the expanded layers (see Figure 5(b) for comparison).
Importance of linear bottlenecks. The linear bottleneck models are strictly less powerful than models with nonlinearities, because the activations can always operate in linear regime with appropriate changes to biases and scaling. However our experiments shown in Figure 5(a) indicate that linear bottlenecks improve performance, providing support that nonlinearity destroys information in lowdimensional space.
7 Conclusions and future work
We described a very simple network architecture that allowed us to build a family of highly efficient mobile models. Our basic building unit, has several properties that make it particularly suitable for mobile applications. It allows very memoryefficient inference and relies utilize standard operations present in all neural frameworks.
For the ImageNet dataset, our architecture improves the state of the art for wide range of performance points.
For object detection task, our network outperforms stateofart realtime detectors on COCO dataset both in terms of accuracy and model complexity. Notably, our architecture combined with the SSDLite detection module is less computation and less parameters than YOLOv2.
On the theoretical side: the proposed convolutional block has a unique property that allows to separate the network expressiveness (encoded by expansion layers) from its capacity (encoded by bottleneck inputs). Exploring this is an important direction for future research.
Acknowledgments
We would like to thank Matt Streeter and Sergey Ioffe for their helpful feedback and discussion.
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Appendix A Bottleneck transformation
In this section we study the properties of an operator , where represents an channel pixel, is an matrix and is an matrix. We argue that if , transformations of this form can only exploit nonlinearity at the cost of losing information. In contrast, if
, such transforms can be highly nonlinear but still invertible with high probability (for the initial random weights).
First we show that is an identity transformation for any point that lies in the interior of its image.
Lemma 1
Let . If a volume of is nonzero, then .
Proof:
Let . First we note that if , then for all . Indeed, image of does not contain points with negative coordinates, and points with zerovalued coordinates can not be interior points. Therefore for each , as desired.
It follows that for an arbitrary composition of interleaved linear transformation and operators, if it preserves nonzero volume, that part of the input space that is preserved over such a composition is a linear transformation, and thus is likely to be a minor contributor to the power of deep networks. However, this is a fairly weak statement. Indeed, if the input manifold can be embedded into dimensional manifold (out of dimensions total), the lemma is trivially true, since the starting volume is . In what follows we show that when the dimensionality of input manifold is significantly lower we can ensure that there will be no information loss.
Since the nonlinearity is a surjective function mapping the entire ray to , using this nonlinearity in a neural network can result in information loss. Once collapses a subset of the input manifold to a smallerdimensional output, the following network layers can no longer distinguish between collapsed input samples. In the following, we show that bottlenecks with sufficiently large expansion layers are resistant to information loss caused by the presence of activation functions.
), the average hasn’t changed but the standard deviation grew dramatically. Best viewed in color.
Lemma 2 (Invertibility of ReLU)
Consider an operator , where is an matrix and . Let for some , then equation has a unique solution with respect to if and only if has at least nonzero values and there are linearly independent rows of that correspond to nonzero coordinates of .
Proof:
Denote the set of nonzero coordinates of as and let and be restrictions of and to the subspace defined by . If , we have where is underdetermined with at least one solution , thus there are infinitely many solutions. Now consider the case of and let the rank of be . Suppose there is an additional solution such that , then we have , which cannot be satisfied unless .
One of the corollaries of this lemma says that if , we only need a small fraction of values of to be positive for to be invertible.
The constraints of the lemma 2 can be empirically validated for real networks and real inputs and hence we can be assured that information is indeed preserved. We further show that with respect to initialization, we can be sure that these constraints are satisfied with high probability. Note that for random initialization the conditions of lemma 2 are satisfied due to initialization symmetries. However even for trained graphs these constraints can be empirically validated by running the network over valid inputs and verifying that all or most inputs are above the threshold. On Figure 7 we show how this distribution looks for different MobileNetV2 layers. At step the activation patterns concentrate around having half of the positive channel (as predicted by initialization symmetries). For fully trained network, while the standard deviation grew significantly, all but the two layers are still above the invertibility thresholds. We believe further study of this is warranted and might lead to helpful insights on network design.
Theorem 1
Let be a compact dimensional submanifold of . Consider a family of functions from to parameterized by matrices . Let be a probability density on the space of all matrices that satisfies:

for any measurezero subset ;

(a symmetry condition) for any and any diagonal matrix with all diagonal elements being either or .
Then, the average volume of the subset of that is collapsed by to a lowerdimensional manifold is
where and
Proof:
For any with , let be a corresponding quadrant in . For any dimensional submanifold , acts as a bijection on if has at least positive values^{4}^{4}4unless at least one of the positive coordinates for all is fixed, which would not be the case for almost all and and contracts otherwise. Also notice that the intersection of with is almost surely dimensional. The average volume of that is not collapsed by applying to is therefore given by:
(3) 
where , is a step function and is a volume of the largest subset of that is mapped by to . Now let us calculate . Recalling that for any with , this average can be rewritten as . Noticing that the subset of mapped by to is also mapped by to , we immediately obtain and therefore . Substituting this and into Eq. 3 concludes the proof.
Notice that for sufficiently large expansion layers with , the fraction of collapsed space can be bounded by:
and therefore performs a nonlinear transformation while preserving information with high probability.
We discussed how bottlenecks can prevent manifold collapse, but increasing the size of the bottleneck expansion may also make it possible for the network to represent more complex functions. Following the main results of [47], one can show, for example, that for any integer and there exist a network of layers, each containing neurons and a bottleneck expansion of size such that it maps input volumes (linearly isomorphic to ) to the same output region . Any complex possibly nonlinear function attached to the network output would thus effectively compute function values for input linear regions.