In-RDBMS Hardware Acceleration of Advanced Analytics

01/08/2018
by   Divya Mahajan, et al.
0

The data revolution is fueled by advances in several areas, including databases, high-performance computer architecture, and machine learning. Although timely, there is a void of solutions that brings these disjoint directions together. This paper sets out to be the initial step towards such a union. The aim is to devise a solution for the in-Database Acceleration of Advanced Analytics (DAnA). DAnA empowers database users to leap beyond traditional data summarization techniques and seamlessly utilize hardware-accelerated machine learning. Deploying specialized hardware, such as FPGAs, for in-database analytics currently requires hand-designing the hardware and manually routing the data. Instead, DAnA automatically maps a high-level specification of in-database analytics queries to the FPGA accelerator. The accelerator implementation is generated from a User Defined Function (UDF), expressed as part of a SQL query in a Python-embedded Domain Specific Language (DSL). To realize efficient in-database integration, DAnA accelerators contain a novel hardware structure, Striders, that directly interface with the buffer pool of the database. DAnA obtains the schema and page layout information from the database catalog to configure the Striders. In turn, Striders extract, cleanse, and process the training data tuples, which are consumed by a multi-threaded FPGA engine that executes the analytics algorithm. We integrated DAnA with PostgreSQL to generate hardware accelerators for a range of real-world and synthetic datasets running diverse ML algorithms. Results show that DAnA-enhanced PostgreSQL provides, on average, 11.3x end-to-end speedup than MADLib and 5.4x faster than multi-threaded MADLib running on Greenplum. DAnA provides these benefits while hiding the complexity of hardware design from data scientists and allowing them to express the algorithm in 30-60 lines of Python.

READ FULL TEXT

page 4

page 8

page 11

research
01/22/2022

Shire: Making FPGA-accelerated Middlebox Development More Pleasant

We introduce an approach to designing FPGA-accelerated middleboxes that ...
research
04/07/2020

ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning

We present ESP4ML, an open-source system-level design flow to build and ...
research
12/01/2022

FADEC: FPGA-based Acceleration of Video Depth Estimation by HW/SW Co-design

3D reconstruction from videos has become increasingly popular for variou...
research
06/19/2023

Co-design Hardware and Algorithm for Vector Search

Vector search has emerged as the foundation for large-scale information ...
research
03/05/2019

Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim

NVDLA is an open-source deep neural network (DNN) accelerator which has ...
research
01/19/2018

HGum: Messaging Framework for Hardware Accelerators

Software messaging frameworks help avoid errors and reduce engineering e...
research
04/07/2020

Modularis: Modular Data Analytics for Hardware, Software, and Platform Heterogeneity

Today's data analytics displays an overwhelming diversity along many dim...

Please sign up or login with your details

Forgot password? Click here to reset