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High-level Synthesis

by   Issam Damaj, et al.

Hardware synthesis is a general term used to refer to the processes involved in automatically generating a hardware design from its specification. High-level synthesis (HLS) could be defined as the translation from a behavioral description of the intended hardware circuit into a structural description similar to the compilation of programming languages (such as C and Pascal into assembly language. The chained synthesis tasks at each level of the design process include system synthesis, register-transfer synthesis, logic synthesis, and circuit synthesis. The development of hardware solutions for complex applications is no more a complicated task with the emergence of various HLS tools. Many areas of application have benefited from the modern advances in hardware design, such as automotive and aerospace industries, computer graphics, signal and image processing, security, complex simulations like molecular modeling, and DND matching. The field of HLS is continuing its rapid growth to facilitate the creation of hardware and to blur more and more the border separating the processes of designing hardware and software.


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Code Repositories


Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks

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The Shang high-level synthesis framework

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Polyphony is Python based High-Level Synthesis compiler.

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Recursion for High Level Synthesis

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Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks

view repo