DeepAI AI Chat
Log In Sign Up

Hardware architecture for high throughput event visual data filtering with matrix of IIR filters algorithm

by   Marcin Kowalczyk, et al.

Neuromorphic vision is a rapidly growing field with numerous applications in the perception systems of autonomous vehicles. Unfortunately, due to the sensors working principle, there is a significant amount of noise in the event stream. In this paper we present a novel algorithm based on an IIR filter matrix for filtering this type of noise and a hardware architecture that allows its acceleration using an SoC FPGA. Our method has a very good filtering efficiency for uncorrelated noise - over 99 has been tested for several event data sets with added random noise. We designed the hardware architecture in such a way as to reduce the utilisation of the FPGA's internal BRAM resources. This enabled a very low latency and a throughput of up to 385.8 MEPS million events per second.The proposed hardware architecture was verified in simulation and in hardware on the Xilinx Zynq Ultrascale+ MPSoC chip on the Mercury+ XU9 module with the Mercury+ ST1 base board.


page 1

page 2

page 3

page 4


Architecture Support for FPGA Multi-tenancy in the Cloud

Cloud deployments now increasingly provision FPGA accelerators as part o...

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems

Neuromorphic systems typically use the Address-Event Representation (AER...

hARMS: A Hardware Acceleration Architecture for Real-Time Event-Based Optical Flow

Event-based vision sensors produce asynchronous event streams with high ...

A fully pipelined FPGA accelerator for scale invariant feature transform keypoint descriptor matching,

The scale invariant feature transform (SIFT) algorithm is considered a c...

Dynamic Resource-aware Corner Detection for Bio-inspired Vision Sensors

Event-based cameras are vision devices that transmit only brightness cha...

fpgaHART: A toolflow for throughput-oriented acceleration of 3D CNNs for HAR onto FPGAs

Surveillance systems, autonomous vehicles, human monitoring systems, and...