FLAG: A Framework for FPGA-based LoAd Generation in Profinet Communication

09/09/2019
by   Ahmad Khaliq, et al.
0

Like other automated system technologies, PROFINET, a real-time Industrial Ethernet Standard has shown increasing level of integration into the present IT Infrastructure. Such vast use of PROFINET can expose the controllers and I/O devices to operate in critical failures when traffic goes unexpectedly higher than normal. Rigorous testing of the running devices then becomes essential and therefore, in this paper, we prototype and design an FPGA based load Generating solution called FLAG (FPGA-based LoAd Generator) for PROFINET based traffic at the desired load configurations such as, bits per second, the number and size of the packets with their Ethertypes and MAC addresses. We have employed, a Zynq-7000 FPGA as our implementation platform for the proposed FLAG framework. The system can easily be deployed and accessed via the web or command line interface for successful load generation. Extensive experiments have been conducted to verify the effectiveness of our proposed solution and the results confirm that the proposed framework is capable to generate precise load at Fast/Gigabit line rate with a defined number of packets.

READ FULL TEXT
research
05/01/2019

Profi-Load: An FPGA-Based Solution for Generating Network Load in Profinet Communication

Industrial automation has received a considerable attention for last few...
research
03/28/2023

EJ-FAT Joint ESnet JLab FPGA Accelerated Transport Load Balancer

To increase the science rate for high data rates/volumes, Thomas Jeffers...
research
09/12/2020

oT-Flock: An Open-source Framework for IoT Traffic Generation

Network traffic generation is one of the primary techniques that is used...
research
08/21/2016

FPGA Design for Pseudorandom Number Generator Based on Chaotic Iteration used in Information Hiding Application

Lots of researches indicate that the inefficient generation of random nu...
research
10/30/2019

Scalable High Performance SDN Switch Architecture on FPGA for Core Networks

Due to the increasing heterogeneity in network user requirements, dynami...
research
02/23/2021

PIERES: A Playground for Network Interrupt Experiments on Real-Time Embedded Systems in the IoT

IoT devices have become an integral part of our lives and the industry. ...

Please sign up or login with your details

Forgot password? Click here to reset