Fakernet – small and fast FPGA-based TCP and UDP communication

03/27/2020
by   H. T. Johansson, et al.
0

A common theme of data acquisition systems is the transport of data from digitising front-end modules to stable storage and online analysis. A good choice today is to base this on the ubiquitous, commercially and cheaply available Ethernet technology. A firmware building block to turn already the FPGA of front-end electronics into a TCP data source and UDP control interface using a data-flow architecture is presented. The overall performance targets are to be able to saturate a 1 Gbps network link with outbound data, while using few FPGA resources. The goal is to replace the use of custom data buses and protocols with ordinary Ethernet equipment. These objectives are achieved by being just-enough conforming, such that no special drivers are needed in the PC equipment interfacing with the here presented Fakernet system. An important design choice is to handle all packet-data internally as 16-bit words, thus reducing the clock-speed requirements. An advantageous circumstance is that even at 1 Gbps speeds, for local network segments, the round-trip times are usually well below 500 microseconds. Thus, less than 50 kiB of unacknowledged data needs to be in-flight, allowing to saturate a network link without TCP window scaling. The Fakernet system has so far been shown to saturate a 100 Mbps link at 11.7 MB/s of TCP output data, and able to do 32-bit control register accesses at over 450 kword/s.

READ FULL TEXT
research
02/06/2020

Fast FPGA emulation of analog dynamics in digitally-driven systems

In this paper, we propose an architecture for FPGA emulation of mixed-si...
research
11/18/2016

Fast and reconfigurable packet classification engine in FPGA-based firewall

In data communication via internet, security is becoming one of the most...
research
03/29/2022

100 Gb/s High Throughput Serial Protocol (HTSP) for Data Acquisition Systems with Interleaved Streaming

Demands on Field-Programmable Gate Array (FPGA) data transport have been...
research
10/27/2020

hXDP: Efficient Software Packet Processing on FPGA NICs

FPGA accelerators on the NIC enable the offloading of expensive packet p...
research
12/23/2021

Hardware Support for FPGA Resource Elasticity

FPGAs are increasingly being deployed in the cloud to accelerate diverse...
research
08/15/2022

A novel approach for FPGA-to-server data transmission over an Ethernet-based network using the eXpress Data Path technology

In the context of the upgrade of the Large Hadron Collider at CERN for h...
research
08/26/2019

Cyclic Sequence Generators as Program Counters for High-Speed FPGA-based Processors

This paper compares the performance of conventional radix-2 program coun...

Please sign up or login with your details

Forgot password? Click here to reset