Exploring the Scope of Unconstrained Via Minimization by Recursive Floorplan Bipartitioning

11/13/2018 ∙ by Bapi Kar, et al. ∙ 0

Random via failure is a major concern for post-fabrication reliability and poor manufacturing yield. A demanding solution to this problem is redundant via insertion during post-routing optimization. It becomes very critical when a multi-layer routing solution already incurs a large number of vias. Very few global routers addressed unconstrained via minimization (UVM) problem, while using minimal pattern routing and layer assignment of nets. It also includes a recent floorplan based early global routability assessment tool STAIRoute <cit.>. This work addresses an early version of unconstrained via minimization problem during early global routing by identifying a set of minimal bend routing regions in any floorplan, by a new recursive bipartitioning framework. These regions facilitate monotone pattern routing of a set of nets in the floorplan by STAIRoute. The area/number balanced floorplan bipartitionining is a multi-objective optimization problem and known to be NP-hard <cit.>. No existing approaches considered bend minimization as an objective and some of them incurred higher runtime overhead. In this paper, we present a Greedy as well as randomized neighbor search based staircase wave-front propagation methods for obtaining optimal bipartitioning results for minimal bend routing through multiple routing layers, for a balanced trade-off between routability, wirelength and congestion. Experiments were conducted on MCNC/GSRC floorplanning benchmarks for studying the variation of early via count obtained by STAIRoute for different values of the trade-off parameters (γ, β) in this multi-objective optimization problem, using 8 metal layers. We studied the impact of (γ, β) values on each of the objectives as well as their linear combination function Gain of these objectives.



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1. Introduction

With sustained advancement in IC fabrication technology, stringent design rules are evolving by exponentially large numbers. Straightforward routing solutions from a HPWL aware placement solution may not yield an acceptable physical design closure due to too many routing violations in subsequent global routing. If these violations are not resolved by the subsequent detailed routing or by an iterative global and detailed routing, the placement (or floorplanning or even logic restructuring) of the design should be redone. In practice, several iterations in block placement (and floorplanning) are required for complex designs containing multi-million gates in order to attain a feasible routing solution (see Fig. 2 (a)). Therefore, it has been a mandate to consider different global routing metrics such as routability, wirelength, congestion (Chang et al., 2003; Liu et al., 2013; Lin and Chu, 2014) and even timing (Sherwani, 1995) as the prime objectives in a placement problem. Some placement engines, however, integrated faster global routing solutions for iterative improvement of the placement solution (He et al., 2013; Pan and Chu, 2006, 2007; Viswanathan and Chu, 2005; Viswanathan et al., 2006). For fewer design iterations before successful routing closure, integrated global/detailed routing methods were also explored (Zhang and Chu, 2012).

Figure 1. Enahancing design for reliability using reduncant-via aware routing (Chen and Chang, 2009)

Modern VDSM fabrication processes, such as and below, continue to allow more routing layers with varying metal width/pitch for successful routing completion. A routing solution with excessive via count not only causes design for reliability issues due to random via failures (Chen and Chang, 2009), but also impacts the circuit performance due to increased resistance along the routing paths with more vias. Double via insertion during post-routing layout optimization or identifying a via-failure aware routing (Chen and Chang, 2009) as depicted in Fig. 1 or even redundant via aware ECO routing during mask optimization (Chien and Wang, 2014) for increased reliability and yield of the fabricated design are some of the known approaches to minimize these failures. Moreover, vias consume substantial routing area and pose as additional routing blockages in the routing regions impacting routability of the design. Therefore, via minimization (Sherwani, 1995) is a critical problem to handle in physical design flow. There are two approaches: (a) unconstrained via minimization (UVM), and (b) constrained via minimization (CVM). While UVM identifies a routing path of a net with minimal number of vias along it for a given number of routing (metal) layers, CVM approaches aims to minimize the number of vias while keeping the routing topology unchanged. This routing topololy is obatined by planar routing solution during early phases of global routing. Although, both are known to be NP-hard problems, UVM is much harder than CVM (Sherwani, 1995; Hsu, 1983). Existing global routers (Cho et al., 2009; Pan and Chu, 2006; Roy and Markov, 2008; Xu et al., 2009), except a few like (Cao et al., 2008; Lu and Sham, 2013; Marek-Sadowska, 1984; Zhang et al., 2008), used CVM based layer assignment approaches on a planar routing solution for reducing via count as well as mitigating congestion (Lee and Wang, 2008).

Figure 2. Physical Design (PD) Flow: (a) Traditional (Sherwani, 1995; oly, [n. d.]), and (b) New (Kar et al., 2013)

Recently, an early global routing (EGR) method STAIRoute (Kar et al., 2013) was proposed for early routability assessment of a floorplanned layout, facilitated by a monotone staircase cut based recursive floorplan bipartitioning framework (Kar et al., 2012; Majumder et al., 2004, 2007). These bipartitioners work on any floorplan irrespective of their sliceability. As (Guruswamy and Wong, 1988; Sur-Kolay and Bhattacharya, 1991) pointed out, the monotone staircase routing framework ensures an well defined routing order of the nets, based on the net cut information available with the nodes in the bipartitioning hierachy (Kar et al., 2012; Majumder et al., 2004, 2007). As highlighted in Fig. 2 (b), STAIRoute works in two stages: (a) enumerating the monotone staircase routing regions in a floorplan by recursive bipartitioning using monotone staircase cuts (Kar et al., 2012; Majumder et al., 2004, 2007), and (b) proposing an early global routing model for routing these nets through a number of metal layers, using these bipartitioning results.

The existing bipartitioning methods using monotone staircase cuts (Dasgupta et al., 2002; Kar et al., 2012; Majumder et al., 2004, 2007) considered only two objectives: (i) the area (number) of the blocks in each bipartition to be maximized, and (ii) the number of nets cut by a bipartition be minimized. While the former objective is related to the height of the bipartition hierarchy (also known as MSC tree (Kar et al., 2012)), minimizing the number of nets being cut has several advantages like: (a) distributing the routing paths of the nets uniformly across the entire layout, (b) reducing routing violations due to congestion hot-spots (congestion ), (c) achieving uniform wire distribution across the layout for minimal variation due to chemical mechanical polishing (CMP) process, and (d) minimizing cross-talk effect due to long (global) nets running through the longer staircases, specially those nets corresponding to the upper nodes in the bipartition tree. In global routing, routing path of a net using multi-bend monotone pattern routing and its variants L/Z patterns (Cao et al., 2008; Kastner et al., 2002) is confined within the net bounding boxes. Therefore, identification of a minimal bend monotone patterns can potentially yield fewer via counts, while L/Z patterns use minimum of one/two vias respectively for minimum layer change.

In this work, we propose a new recursive floorplan bipartitioning framework, for identifying minimal bend monotone staircase routing regions in a floorplan, in order to use fewer vias during early global routing of the nets in the floorplan. The key contributions of this paper are:

  1. define a new objective of bend minimization in the existing multi-objective floorplan bipartitioning problem;

  2. propose a greedy method for identifying minimal bend monotone staircase routing regions for early global routing with smaller via count (this is an early approach for unconstrained via minimization (UVM); and

  3. introduce a randomized neighbor search technique and staircase wave front propagation approach for exploring a larger solution space of potentially optimal minimal bend monotone staircase regions in a floorplan.

The organization of this paper is as follows: in Section 2, we discuss the background on monotone staircase routing region definition in a floorplan. The proposed floorplan bipartitioning method, for identifying a set of monotone staircases with minimal number of bends for the entire floorplan, is presented in Section 3. Section 4 discusses the basis for an extension of this greedy bipartitioning method and illustrates a new randomized neighbor search technique and the corresponding staircase wave-front propagation approach. Experimental results and relevant discussions are covered in Section 5, followed by the summary of this work in Section 6.

2. Background on Monotone Staircase Cuts

Before discussing the proposed recursive floorplan bipartitioning method, we revisit the formulation of an unweighted directed graph , namely block adjacency graph (BAG) (Kar et al., 2012; Majumder et al., 2004), used to define the adjacency relation of a set of blocks in a given floorplan . The graph is defined as follows: the vertex set = { corresponds to block } and the edge set where = {(,) block is on the left of (above) an adjacent block in }. The vertices corresponding to the top-left and the bottom-right corner blocks are designated as the source and the sink vertices respectively, with zero in-degree and out-degree respectively. This definition yields a monotonically increasing staircase (MIS) (see Fig. 3 (a)).

Figure 3. A floorplan and the corresponding BAGs for a (a) MIS and (b) MDS cut (Kar et al., 2012)

The definition of BAG for obtaining a monotonically decreasing staircase (MDS) is as follows: edge ={() for a pair of adjacent blocks () such that is to the left of (below) }. The source and sink vertices are identified as the vertices pertaining to the bottom-left and top-right corner blocks respectively. This scenario is captured in Fig. 3 (b) along with the MDS cut . In the rest of the paper we refer an MIS/MDS cut as a ms-cut unless stated explicitly. It is to be noted that, unlike in (Majumder et al., 2004, 2007), this graph based framework does not consider any netlist information while constructing BAG for faster bipartitioning results. The netlist information is solely used to identify the cut nets and the uncut nets that fall on either side of the bipartition. These uncut nets and the respective parts of the cut nets with atleast two pins in each part. In this method, net cut information in each level of the bipartition hierarchy is a measure of the optimality of each ms-cut obtained, and is referred to as min-cut balanced floorplan bipartitioning (Majumder et al., 2004, 2007).

In order to ensure each cut in BAG is an ms-cut, we refer to the following lemma given in (Majumder et al., 2004), commonly known as monotone staircase property.

Lemma 2.1 ().

If is an arc in , then there exists at least one monotone staircase in the floorplan such that the blocks and appear in the left and right partitions respectively, and there exists no staircase with in the right partition and in the left partition.


In (Majumder et al., 2004). ∎

Figure 4. Illustration of Lemma 2.1: a floorplan with a (a) monotone staircase, and (b) non-monotone staircase

In Fig. 4, we illustrate the working of Lemma 2.1 for an MIS cut, which is equally applicable for an MDS cut. It shows that all the cut edges in the BAG are forward edges, i.e., directed from the left partition containing the source vertex towards the right partition containing the sink vertex yielding a valid monotone staircase cut. However, in Fig. 4 (b), the highlighted edge (,) in the BAG is directed from the right partition to the left partition. This cut leads to a non-monotone staircase cut. From this illustration and Lemma 2.1, we observe that it requires at least one back edge directed from the right to left partition to generate a non-monotone staircase cut.

Corollary 2.2 ().

Given a BAG formulated for obtaining a MIS (MDS) cut, any cut which has at least one back edge results in a non-monotone staircase cut.


From Lemma 2.1 and Fig. 4 (b). ∎

In order to study the advantage of early global routing using monotone staircase patterns over non-monotone staircases, we consider the example in Fig. 5 for two different routing instances of a two pin net having terminal pins (, ). Wirelength for the monotone routing path is equal to half of the bounding box length of the net, i.e., half perimeter wirelength (HPWL), while that of the non-monotone path yields extra wirelength beyond HPWL. This eventually consumes more routing area and hence increases the congestion in the routing regions, impacting the routability of the nets. A non-monotone pattern may also require more number of vias depending the number of bends in it. On the other hand, a suitably chosen monotone staircase pattern with fewer bends in it may yield fewer via counts. Therefore, pattern routing using non-monotone staircases is not beneficial for identifying a shortest routing path, as well as fewer via counts. Nevertheless, non-monotone routing (Zhang et al., 2008) or maze routing (Lee, 1961; Sherwani, 1995) can be effective when monotone or L/Z (Kastner et al., 2002; Cao et al., 2008) patterns can not be used due to heavy congestion and more routing blockages due to already routed nets within the bounding box of a net. This leads to a detoured routing path with increased wirelength and possibly higher via count, identified using non-monotone or maze routing.

Figure 5. Illustrating two routing instances of a -pin net = (,) using a: (a) monotone staircase path, and (b) non-monotone staircase path

Our study also shows that a very large number of monotone routing paths with varying number of bends are possible within the bounding box of a net, L/Z patterns being a subset of all those possible patterns with only one/two via overhead. An optimal monotone pattern is the one which takes minimal number of (bends) vias to complete the routing between a pair of pins through a set of metal layers, thus motivating this work. In this paper, the proposed recursive bipartitioning framework identifies a set of optimal monotone staircases with minimal number of bends in a given floorplan, for early global routing of the nets with minimal wirelength and via count. In this paper, we used only STAIRoute as the early global routing tool, by preferred directional routing in different metal layers.

3. Monotone Staircase Bipartitioning with Minimal Bends

In this section, we discuss the proposed recursive floorplan bipartitioning method in order to identify a set of minimal bend monotone staircase routing regions in a floorplan, for obtaining the shortest routing paths of a set of nets in floorplan, by an early global routing framework such as STAIRoute (Kar et al., 2013). Before that, we study the impact of a number of bends in a monotone staircase routing region on the number of vias when a net is routed through it, using reserved layer model for layer assignment of the net segments in different routing layers. In this routing model, horizontal and vertical segments of a net are routed through designated metal layers, say and respectively (see Fig. 5). This requires inter-layer metal interconnects, called vias, to establish electrical connections between the wire segments of a net running in different layers. For the sake of simplicity, we assume routing with two routing layers (), although it can be extended to any number of permissible layers in the fabrication processes.

Figure 6. Impact of bends in a monotone staircase region on the number of vias (marked as )

We consider two different routing instances between the terminal points (pins) and of a net segment as depicted in Fig. 6. These routes, denoted as and respectively, use different monotone staircase paths with different bend counts. While routing path uses five vias, requires only three vias. From this example, we infer that a monotone staircase with fewer bends can potentially reduce the number of vias when a net is routed through it using different metal layers and hence serves as the motivation of this work.

The problem definition in this work is augmented over the existing bipartitioning methods such (Dasgupta et al., 2002; Kar et al., 2012; Majumder et al., 2004, 2007), considering a new objective of bend minimization. We enlist the objectives of this new multi-objective optimization problem as below:

  1. balance ratio = min(,)/max(,) be maximized

  2. the number of cut nets () be minimized, and

  3. the number of bends () in the monotone staircase be minimized

where , the area of the left (right) partition and

denotes the set of blocks in the left (right) partition. The number balanced bipartition problem can be seen as a restricted version of the area balanced bipartitioning problem when the area of each block is almost equal, i.e., having negligible variance in block area such that they can be normalized to unity. In this case,

is defined as min(,)/max(,), where () denotes the number of blocks in the left (right) partition.

A linear combination function of these objectives, with a pair of trade-off parameters (, ), is defined as below:


where is the maximum possible number of bends if the constituent rectilinear segments in the corresponding monotone staircase had alternating (vertical or horizontal) orientation. It is computed as one fewer than the number of segments in it. Notably, Eqn. 1 is similar to that defined in (Kar et al., 2012) when . Careful selection of (, ) pair may yield an optimal balance among these objectives, not necessarily a global optimum. Since the area balanced bipartitioning is an NP-hard problem (Majumder et al., 2007), the optimum balance among these objectives is hard to obtain in polynomial time. Instead, for a given (, ) pair, an optimal monotone staircase with maximum is chosen out of those with values in the sequence of bipartitions of a floorplan of blocks (Kar et al., 2012) (see Fig. 7), at a given bipartition hierarchy. In Section 5, we study the bipartitioning results with a range of (, ) values on a set of floorplan benchmark circuits.

Figure 7. A sequence of monotone staircases with varying number of bends (denoted as ) in a given floorplan: (a) , (b) , (c) , (d) , (e) , (f) , (g) and (g)

Now we refer to Fig. 7 for the working of this bipartitioning framework while maximizing the area in each partition and assessing the corresponding bends in the resulting monotone staircase. In this study, we do not consider minimal net cut for the sake of simplicity and restrict only to area balance and minimal bend count. The bipartition instance in Fig. 7 (a) and (h) gives minimum number of bends (), but with poor area balance. The area balance between the partitions keeps on improving through the instances depicted in Fig. 7 (b)-(e) with varying number of bends, while it declines for instances shown in Fig. 7 (f)-(h). The best possible area balance may be attained in case of the bipartition in Fig. 7 (e), but yields the worst bend count () among all others. Therefore, a suitable trade-off between area balance and bend count has to be made based on (, ) values. The bipartition instance with in Fig. 7 (d) appears to be a good choice among all the other instances. The following lemma gives a measure of the number of bends in a monotone staircase.

Lemma 3.1 ().

Given a floorplan with blocks, the number of bends in a monotone staircase routing region is .


The number of bends in a monotone staircase can be at most one fewer than the number of cut edges in BAG due to alternate orientation of the contiguous cut edges. Since is a planar graph (Kar et al., 2012; Majumder et al., 2004) and is , the number of cut edges (a subset of ) that constitutes a monotone staircase is also . ∎

3.1. The Algorithm: BFS based Greedy Approach

The pseudo-code for the proposed monotone staircase bipartitioning method with minimal bends, namely MSCut_Bend_BFS, is presented in Algorithm 1. The inputs to this method are the BAG obtained from a given floorplan of a set of blocks , a set of nets , the trade-off parameters (, ) such that . The balance type dictates either an area or a number balanced bipartitioning (Majumder et al., 2004, 2007). Unlike the previous works, we focus on area balanced bipartitioning only, since number balanced mode is a special case of it. The key differences between MSCut_Bend_BFS and the bipartitioning method in (Kar et al., 2012) are: (i) bend minimization considered as an additional objective, and (ii) no restriction on the convergence within user-defined area bounds. In rare floorplan instances, these area bounds in (Kar et al., 2012) may lead to exploration of a sequence of monotone staircases. On contrary, our method is able to explore a sequence of staircases without any such constraints on any floorplan of blocks.

input : , , , ,
output : An optimal monotone staircase for a given (, ) with maximal area balance, minimal net cut and minimal number of bends
1 Initialize a Queue and the left partition =
2 Enqueue the source vertex of in as (BFS) level vertex, and include it in (right partition = )
3 /* A vertex once enqueued always remains in (Kar et al., 2012)*/
4 Also enqueue as BFS level indicator
5 while  is not empty do
6       Let be the dequeued vertex
7       if ( ) then
8             for ( adj()) do
9                   if () results in a valid ms-cut (see Lemma 2.1) then
10                         Enqueue the vertex and include it in
11                         Compute the parameters for the () partition (see Eqn. 1) and store them in a list
12                   end if
14             end for
16       end if
17      else
18             Increment BFS level
19             Enqueue as next BFS level indicator
21       end if
23 end while
24Return an optimal monotone staircase with the maximum value
Algorithm 1 MSCut_Bend_BFS

The recursive procedure for obtaining a set of minimal bend monotone staircases for the entire floorplan is presented in Algorithm 2, by recursively calling MSCut_Bend_BFS with a set of required inputs. Here, dictate the output staircase type, either an MIS or MDS (see Fig. 3). In this procedure, the root node of the bipartition hierarchy starts with a particular type e.g. MIS, followed by alternating types in the subsequent levels of the hierarchy. An example of a bipartition (MSC) tree in Fig. 8 illustrates a set of optimal monotone staircases (MIS/MDS) with minimal bends are overlaid on an input floorplan of blocks.

input : , , , , , ,
output : A bipartition hierarchy (MSC tree) with increasing (decreasing) monotone staircases MIS (MDS) at alternate level
1 if () then
3 end if
6 end if
7 = ConstructBAG() /* (see Fig. 3) */
8 Node.cut = MSCut_Bend_BFS(, , , , )
9 Node.Level = ; increment
10 if () then
11       Node.left = Hier_MSCut_Bend(, , , , , , )
12 end if
13if () then
14       Node.right = Hier_MSCut_Bend(, , , , , , )
15 end if
Return Node.
Algorithm 2 Hier_MSCut_Bend
Figure 8. A floorplan of blocks (a) with monotone increasing/decreasing staircases (MIS/MDS), and (b) a (neraly) balanced bipartition tree (MSC tree (Kar et al., 2012)) for a () pair
Theorem 3.2 ().

Given a floorplan with blocks and nets, Hier_MSCut_Bend takes time to generate a hierarchy of minimal bend monotone staircases in it.


Since the block adjacency graph of a given floorplan instance for blocks is a planar graph, its construction takes time. By Lemma 3.1, each while loop in Algoritth 1 (MSCut_Bend_BFS) takes for identifying bends and for net bipartition. Thus, at any recursion level , each call to MSCut_Bend_BFS takes , i.e., . Since, MSCut_Bend_BFS yields a (nearly) balanced bipartition of the (sub)floorplans at each recursion, the number of levels in the bipartition hierarchy (called MSC tree (Kar et al., 2012)) is . Therefore, for the entire bipartition hierarchy of levels, the recursive procedure Hier_MSCut_Bend takes time to identify a set of minimal bend monotone staircases for the entire floorplan . ∎

In Section 5, we provide a few experimental results to show that the bipartition hierarchy, i.e., MSC tree has height for any floorplan instance of a circuit containing blocks with any area distribution.

4. A New Randomized Neighbor Search Approach

Figure 9. A floorplan of blocks (a) overlaid with an optimal monotone staircase and a near optimal staircase , and (b) the corresponding hasse diagram (has, [n. d.]) for exponentially large number of sequences (paths) of monotone staircases: the blue path containing and black path containing

Given floorplan for a set of blocks, the number of all possible monotone staircases in is exponentially large. Hence, the problem of finding the optimum monotone staircase is known to be NP-Hard (Dasgupta et al., 2002; Majumder et al., 2007). As discussed in Section 3, an (near) optimal solution of monotone staircase bipartition implies a suitable trade-off between the constituent objectives: (a) maximizing the area of each bipartition, (b) minimizing the number of bends in the corresponding monotone staircase, and (c) the number of cut nets by this bipartition. Since the area balanced bipartitioning is an NP-Hard problem (Majumder et al., 2007)

, no polynomial time algorithm exists. Hence, several greedy heuristic approaches have been proposed in

(Dasgupta et al., 2002; Kar et al., 2012; Majumder et al., 2004, 2007) and in Section 3. In all cases, a monotone staircase cut with the maximum value pertaining to a given trade-off among the objectives is considered as an optimal bipartition. As stated in Section 3, we pick an (nearly) optimal monotone staircase among a sequence of monotone staircases for a given () pair. Intuitively, different () pairs may potentially yield different optimal solution(s) and even a different sequence.

Given a set of blocks for a given floorplan , a monotone staircase bipartition (, ) represents a proper subset of . In other words, the blocks in the left partition (hence the right partition = ) constitute a proper subset of , while obeying the monotone staircase property (refer to Lemma 2.1 (Majumder et al., 2004)). Thus, (, ) represents a valid monotone staircase cut on the block adjacencyy graph (BAG) for . In summary, the set of all possible monotone staircases in is a subset of power set of (). Notably, is a partially ordered set by inclusion operation on all the monotone staircases in that can be identified in exponential time. A staircase covers a set of one or more staircases if can be obtained from . Based on this, we construct the corresponding hasse diagram (has, [n. d.]) pertaining to . An example hasse diagram for a floorplan of = (and ) is illustrated in Fig. 9.

In Section 3 and also in (Kar et al., 2012), we studied that a sequence of monotone staircases can be identified greedily at any level of bipartition hierarchy by the respective bipartitioning methods. An optimal solution is identified from this sequence based on a given trade-off (). There is a scope of obtaining an improved solution if more than staircases can be explored, with proportionally higher runtime overhead. In this section, we present a new technique for exploring the neighbors of a block (vertex) in the BAG for a potentially better optimal monotone staircase (obeying Lemma 2.1 in terms of the objectives considered. We study how selection of a neighbor is done based on random indexing of the neighbors of vertex in . Alike the BFS based method (see Algorithm 1), the proposed bipartitioning method also adopts BFS on . However, this method can more aptly resemble with an wave-front propagation in Ether. This may lead to different sequences of (not necessarily disjoint) monotone staircase cuts on the BAG. In Fig. 9 (b), an example of these sequences are highlighted by different paths, one with black and other by blue color, from START to STOP node in the hasse diagram. In this diagram, each node represent a distinct monotone staircase and edges represent their possible transition to another distinct monotone staircase. In other words, these edges represent the inclusion operation. While the directed search method in Section 3 identifies only one sequence marked by the bold black line in Fig. 9 (b), the randomized method under discussion identifies different sequences during different trials of the proposed randomized neiighbor search technique. Notably, the number of sequences obtained by the random method can be more than one, but are not necessarily maximally disjoint. It is also evident that the length of such a path (START STOP) is always as stated in Lemma of (Kar et al., 2012). However, the number of such paths grow exponentially with and the sequences (hence the Hasse diagram) also differ due to different floorplan topology for the same set of blocks . A comparative study of staircase wave-front propagation using greedy and randomized neighbor search technique is presented in Appendix 7.1.

In Fig. 9 (b), we consider an example of two different sequences of monotone staircases marked by the blue and black lines, out of exponentially large number of possible sequences between START and STOP nodes. Here START and STOP nodes denote trivial monotone staircases containing only one block in the left (right) partition. If one path does not contain an optimal monotone staircase, another path may be explored in a hope to identify an optimal one. Since area balanced monotone staircase bipartitioning is a NP-hard problem, there is no method that verifies such a scenario, unless we apply the brute force method to explore all possible sequences. However, a random transition from one node to another may lead to traversing a new path either completely or partially. Careful study of Fig. 9 (b) shows that randomization at the suitable node, say in this case , choosing the block randomly instead of (by greedy approach) may guide to a different sequence leading to a potentially optimal solution , for a given (, ) pair. In summary, several such randomized selections (while traversing from START STOP) may yield an optimal solution or a scope of obtaining a better solution than the previously found optimal solution. A number of such trials may be exercised in order to explore partially/completely different sequences and thus obtain a potentially better solution. However, in order to contain the run time within the same bound as in Section 3, a large number of such trials can not be afforded. Instead, we restrict the number of trials to a reasonably small number and use random seeds for each trial. After all such trials, an optimal monotone staircase is identified as the one, with maximum value, among all the staircases explored along different paths in START STOP.

Figure 10. Exploring the neighbors of in based on their indexing

In the proposed randomized neigbor search method (Kar et al., 2015), the underlying process of randomly indexing the neighbors of a vertex of brings in the difference with the greedy methods (Kar et al., 2012, 2014). Unlike greedy indexing approach, from left to right used in (Kar et al., 2012) and also in Section 3 (see Fig. 10 (a)), a neighbor of with out-degree is indexed with randomly chosen number (see Fig. 10 (b)). As in (Kar et al., 2012) (also Section 3), identifying a set of monotone staircases while exploring all adjacent vertices of takes time for exploring all the neighbors. The following lemma shows that the average runtime improves.

Lemma 4.1 ().

For a given vertex with out-degree in , the expected time to search its adjacent list to identify one or more distinct monotone staircases is .


Since all the vertices in the neighborhood of

are equally probable to be picked, with a probability of

, the expected runtime to search a particular neighbor with random indexing is:

Alike the greedy method in (Kar et al., 2012) and Section 3, the best case scenario occurs when all the edges emanating from obey the monotone staircase property (Lemma 2.1), thus giving distinct monotone staircases. The worst case scenario occurs when the number of such edges is only , resulting in only one monotone staircase. The following lemma gives the average number of staircases can be explored by a single vertex .

Lemma 4.2 ().

For a given vertex with out-degree in , distinct monotone staircases can be identified while obeying Lemma 2.1.


Since, all the edges emanating from have probability of obeying Lemma 2.1, the average case
Hence, distinct monotone staircases can be identified. ∎

4.1. The Pseudo-code for the proposed randomized bipartitioner

In this section, we present the pseudo-code for the proposed randomized floorplan bipartitioning method MSCut_Bend_RAND in Algorithm 3, in order to identify a minimal bend monotone staircase in a given floorplan at a given level of bipartition hierarchy. Alike Algorithm 1, this algorithm is called at any level of the bipartitioning hierarchy. The bipartition hierarchy is obtained by the same recursive framework presented in Algorithm 2.

input : , , , ,
output : An optimal monotone staircase for a given (, ) with maximal area balance, minimal net cut and minimal number of bends
1 Define a Queue , a list and iterator =
2 while () do
3       Initialize left partition = (right partition = )
4       Enqueue the source vertex of in as (BFS) level vertex, and include it in
5       Also enqueue as BFS level indicator
6       while (NOT_EMPTY()) do
7             Let be the dequeued vertex
8             Define a wavefront
9             if ( ) then
12             end if
13            else
14                   while There exists at least one cut edge in emanating the vertex front and terminating on  do
15                         Generate a random seed to choose a cut edge (), such that and
16                         if () yields a valid ms-cut (see Lemma 2.1) then
17                               Enqueue the vertex and include it in
18                               Mark the edge () as explored
19                               Compute the parameters for the () partition (see Eqn. 1) and store them in a list
20                         end if
22                   end while
23                  Increment BFS level
24                   Enqueue as next BFS level indicator
26             end if
28       end while
29      Increment
31 end while
Return optimal monotone staircase with maximum
Algorithm 3 MSCut_Bend_RAND
Lemma 4.3 ().

The proposed randomized bipartitioning method MSCut_Bend_RAND takes time for obtaining an optimal monotone staircase with minimal bend count on BAG of a given floorplan .


Since the number of edges in is and = , where is the out-degree of , it takes time for searching distinct monotone staircases. In this method, we use trials in order to obtain a different sequence of monotone staircases in each trial, but possibly not disjoint. Also the net partitioning procedure takes , while finding the number of bends account for time (see Lemma 3.1). Thus, the overall time taken by the proposed bipartitioning method is , i.e., . ∎

Note that Algorithm 3 has the same time complexity as Algorithm 1, but only a constant times higher due to multiple trials conducted for obtaining different sequences. In order to obtain a set of optimal monotone staircases with minimal bend count for the entire floorplan, the same recursive bipartitioning framework presented in Algorithm 2 can be used. Therefore, the recursive procedure considering the proposed randomized technique takes time to generate a hierarchy of monotone staircase cuts for a given floorplan topology.

5. Experimental Results

In order to verify the correctness and efficiency the proposed bipartitioning methods, we ran them on MCNC/GSRC floorplanning benchmark circuits (par, [n. d.]) (see Table 1). Different floorplan instances of a circuit were generated using Parquet floorplacement tool (Adya and Markov, 2003; par, [n. d.]) using random seeds. In order to observe different bipartitioning scenarios for the same circuit, we generated four different floorplan instances for each circuit. The algorithms were implemented in programming language and run on a Linux platform (GHz, GB RAM).

Suite Circuit #Blocks #Nets Avg. Net
MCNC apte 9 44 3.500
hp 11 44 3.545
xerox 10 183 2.508
ami33 33 84 4.154
ami49 49 377 2.337
GSRC n10 10 54 2.129
n30 30 147 2.102
n50 50 320 2.112
n100 100 576 2.135
n200 200 1274 2.138
n300 300 1632 2.161
Table 1. Floorplanning Benchmarks (par, [n. d.])

5.1. Bipartitioning Results

In our experimental setup, we ran the proposed monotone staircase bipartitioning methods with minimal bends, BFS (see Algorithm 1) and randomized (RAND) version (refer to Algorithm 3) that works in breadth-first traversal (BFS) fashion at any node of the bipartition hierarchy (see Algorithm 2). For experimental purpose, we also came up with a variant of the BFS based greedy method by adopting depth-first search (DFS) on the BAG. Due to lack of space, we are unable to present its pseudo-code. An example showing the working of these bipartitioning methods (BFS, DFS, RAND) is presented in Appendix 7.1.

These experiments were conducted with , and ,, both varying in steps of such that . The corresponding bipartitioning results for BFS, DFS, and RAND methods are presented in Fig. 11 for: (a) area balance ratio (), (b) normalized bend count (), (c) normalized net cut (), and (d) (see Eqn. 1) respectively. The corresponding values were computed as an average of the respective parameters over the specified () pairs and all instances of a given circuit. We compare these results with an earlier BFS based directed search method (Kar et al., 2012) which did not consider bend minimization (BFS-NB). It is also important to note that the results presented in (Kar et al., 2012) is for = only which is similar to the results for = and = case in BFS mode. Moreover, they did not report the individual objective values in their paper. For fair comparison, we ran their code (Kar et al., 2012) for obtaining the results for each of the objectives other than in BFS-NB mode, including runtime.

(a) Area Balance Ratio ()
(b) Bend Ratio ()
(c) Net Cut Ratio ()
(d) Maximum
Figure 11. Comparison of bipartitioning results: this work (BFS, DFS, RAND) vs BFS-NB (available for = ) (Kar et al., 2012)

The results on area balance in Fig. 11 (a) show that BFS-NB (Kar et al., 2012) outperforms all other modes {BFS,DFS,RAND} that used bend minimization objective, by focusing on area balance and net cut only. Among the proposed methods, DFS has the worst area balance values for most of the circuits. For net cut, BFS-NB mode performs well only for a few circuits although the net cut objective has more weight of for = . BFS and RAND have better net cut results for most of the circuits. Likewise, DFS mode continues to give higher net cut values for all the circuits. Regarding the number of bends, RAND mode is consistently better for most of the circuits compared to BFS and DFS. Due to certain floorplan topologies in specific circuits, DFS mode had better average values of bend counts for smaller circuits such as , , , with around blocks and large circuit . Lastly, BFS-NB consistently yielded the worst (highest) bend counts over other modes. Overall, the values reported for each circuit show that BFS-NB is the best for circuits up to , followed by RAND mode which dominates the values over BFS and DFS modes for the remaining circuits. For larger circuits like and above, RAND mode is seen to supersede BFS-NB with the maximum values.

Due to balanced bipartitioning at each node of the bipartition hierarchy (MSC tree (Kar et al., 2012)), the height of the bipartition (MSC) tree is stated to be , where is the number of blocks in a floorplan. The results presented in Fig. 12 for each circuit shows that the average height of the MSC tree taken over the generated floorplan instances and (, ) values, is contained within the tight bounds of and , thus establishing the claim in Theorem 3.2.

Figure 12. Experimental results on the height of MSC tree

Table 2 presents the runtime results for the proposed recursive floorplan bipartitioners (BFS, RAND and DFS) as well as (Kar et al., 2012) (BFS-NB). As stated in Section 4, RAND mode is merely a constant times higher than the other two modes and is more prominent with larger circuits such as , and , while BFS/DFS report similar runtime for all the circuits. But, none of these methods can match the runtime values obtained by the faster method BFS-NB as claimed by (Kar et al., 2012) even for the larger circuits.

Circuit BFS DFS RAND BFS-NB (Kar et al., 2012)
apte 0.005 0.005 0.007 0.005
hp 0.006 0.005 0.009 0.003
xerox 0.011 0.011 0.016 0.009
ami33 0.033 0.032 0.060 0.014
ami49 0.107 0.106 0.225 0.023
n10 0.005 0.004 0.008 0.008
n30 0.031 0.031 0.058 0.006
n50 0.124 0.123 0.220 0.050
n100 0.803 0.800 1.369 0.062
n200 7.841 7.833 12.612 0.432
n300 21.945 22.055 38.967 0.656
Geo Mean 3.601 3.549 6.200 1.000
Table 2. Comparison of CPU time ()

5.2. Via Count in Early Global Routing by STAIRoute

In this section, we present the experimental results on early via estimation by performing early global routing of the corresponding floorplan level netlist using STAIRoute

(Kar et al., 2013) and the bipartitioning results presented in earlier subsection for BFS, DFS, and RAND modes. A maximum of metal layers were used by STAIRoute using preferred routing directions. We present the corresponding results for the largest benchmark circuit in Fig. 13 and 14 for and in steps of . This experimental setup does not apply to BFS-NB mode since the corresponding values of () is not applicable for it. However, our study confirmed that the via count for BFS-NB mode resembles that with BFS mode for = and = .

We also study the variation of via count for two different floorplan instances of , the best-case instance with smaller HPWL (Instance#1) and the worst-case instance with larger HPWL (Instance#2) in Fig. 13 and 14. In case of instance#1, DFS mode dominates over BFS and RAND modes only for = . However, cases show that RAND mode dominates DFS for upto some values, such as , and respectively, for the respective . Beyond these values, DFS yields the best via count for this floorplan instance of . In a very small range of and values, i.e., = and , BFS appears to dominate over DFS and RAND modes.

Figure 13. Via count vs. for and values: for Instance

For the worst case instance, RAND gives smallest via count as compared to other modes for = and for . As increases, BFS dominates in lower values of , while RAND dominates for the remaining values with fewer via counts. For all values and the respective values, via count due to DFS mode is almost constant, with some variations near value of and .

Figure 14. Via count vs. for and values: for Instance

The experiments on all benchmark circuits for different floorplan instances showed that there was no significant variation in routed netlength obtained for BFS, DFS and RAND modes, but are better than that obtained in BFS-NB mode. Due to lack of space, we are not able to put the relevant details obtained by STAIRoute. These netlength values as normalized with resepect to no-blockage aware steiner length (computed by FLUTE (Chu and Wong, 2008)

) ratio and their geometric mean values were obtained as

, and for BFS, DFS and RAND modes respectively, while BFS-NB mode yields a value of . Using the approach in (Wei et al., 2012), the average worst case congestion, defined as the ratio of routing demand and routing capacity, for different floorplan instances of all the circuits in all the modes and for all () pairs, remained ensuring routability, using up to metal layers as per the congestion model proposed in STAIRoute (Kar et al., 2013). However, the maximum average congestion (Wei et al., 2012) in any of the floorplan instances for any mode and () values was seen to be . This shows that no monotone staircase routing region had a congestion over in any routing layer as claimed by (Kar et al., 2013).

6. Conclusion

In this paper, we proposed an early version of unconstrained via minimization in floorplan based early global routing, by a new recursive floorplan bipartitioning framework. This bipartitioning framework identifies, for a given floorplan topology, a set of monotone staircase routing regions with minimal number of bends, by: (a) a greedy method employing BFS/DFS based graph search techniques, and (b) a randomized neighbor search technique for staircase wavefront propagation on BAG of the given floorplan. In this work, we first introduce the bend minimization objective in the multi-objective floorplan bipartitioning problem using monotone staircase cuts and used a pair of trade-off parameters (). The solution of this optimization yields a minimal bend monotone staircase routing which impacts the via count during floorplan based early global routing.

Experimental results show the impact of the results of the proposed minimal bend monotone staircase bipartitioning methods on via count during early global routing for varying () pairs and yield fewer via counts. This framework can potentially assess the quality of the floorplan in terms of these via counts.

7. Appendix

7.1. Staircase Wave-front Propagation in a Floorplan

We consider an example of monotone staircase wave-front propagation in a floorplan instance for blocks, as depicted in Fig. 15. In this example, we study how different monotone staircase cuts on BAG can sequentially be obtained by the proposed DFS, BFS and randomized bipartitioning methods (RAND). This helps in exploring different sequences of monotone staircases with increased solution space for identifying an optimal monotone staircase for a given () pair.

Figure 15. Illustrating initial trail of sequences of monotone staircase wave-fronts: (a) BFS, (b) DFS, and (c) 1st, (d) 2nd, and (e) 3rd trial of RAND

Due to space limitation, only first few steps for identifying a sequence of monotone staircases obtained by BFS/DFS based bipartitioning are illustrated in Fig. 15 (a) and (b). It shows that both the methods greedily search the neighborhood of a vertex (block) in the BAG (see Fig. 10 (a)) for propagating the respective wave-fronts. Fig. 15 (c)-(e), illustrates three different trials of Algorithm 3 employing the proposed randomized neighbor search (see Fig. 10 (b)). The trials in RAND yield different wave-front propagation instances, as monotone staircase cuts on the BAG. It is important to note that BFS/DFS explores a fixed sequence of distinct staircases (see Lemma in (Kar et al., 2012)) for the same (, ) value, irrespective of the number of trials. On the other hand, RAND yields different sequences during different trials, by the proposed random neighbor indexing of the vertices. It is not necessary for the sequences to be fully disjoint as evident from Fig. 15 (c)-(e). Despite that, an increased solution space of different monotone staircases (a union of all of them obtained during different trials in RAND mode) facilitates us to identify an optimal monotone staircase with minimal number of bends for a given (), implied by the maximum value.

7.2. Potential cross-talk minimization

This part discusses potential cross-talk minimization by minimizing the number of cut nets at any level of the bipartition hierarchy, MSC tree, by suitably choosing () pair, as illustrated in Fig. 16. In this example, we consider two instances of monotone staircases: (a) with more bends and net cut, and (b) with less bend and net cut, as depicted in Fig. 16 (a) and (b) respectively. In the former case, we see that two nets and are routed through the same monotone staircase routing region (MIS here) using same metal layer and therefore may results in signal cross talk among themselves. The latter case, however, shows that two different staircases are used to route nets and ; although net partly uses the same staircase (MIS), rest of its routing is done through a different staircase (MDS here). Therefore, both and will have minimal scope of signal interference between them.

Figure 16. Scope of cross-talk between a pair of nets and with respect to minimal bends and cut nets in a monotone staircase with: (a) with more bends and cut nets, and (b) less bends and cut nets


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