eBaRe: An Efficient Backup and Restore Techniques in Hybrid L-1 Cache for Energy Harvesting Devices
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Battery operated devices are rapidly increasing due to the bulk usage of IoT enabled nodes in various fields. The alternative and promising solution to replace battery-operated devices is energy harvesters, which helps to power up the embedded devices. The energy harvester systematically stores sufficient energy in a capacitor to power up the embedded device for computing the task. This type of computation is defined as intermittent computing. Energy harvesters cannot ensure a continuous power supply for embedded devices. All registers and cache are volatile in conventional processors. We require a Non-Volatile Memory (NVM) based Non-Volatile Processor (NVP), which store the registers and cache contents during power failure. Introducing NVM at the cache level degrades the system performance and consumes more energy than SRAM based caches. In this paper, an Efficient Backup and Restore (eBaRe) hybrid cache architecture is proposed by integrating SRAM and STT-RAM at a first-level cache. The eBaRe architecture proposes cache block placement and migration policies to reduce the number of writes to STT-RAM. During a power failure, the backup strategy finds the important blocks to migrate from SRAM to STT-RAM. In comparison to baseline architecture, eBaRe architecture reduces STT-RAM writes from 63.35% to 35.93%, resulting in a 32.85% performance gain and 23.42% reduction in energy consumption. Our backup strategy decreases backup time by 34.46% compared with baseline.
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