Early Experience on Using Knights Landing Processors for Lattice Boltzmann Applications

04/05/2018
by   Enrico Calore, et al.
0

The Knights Landing (KNL) is the codename for the latest generation of Intel processors based on Intel Many Integrated Core (MIC) architecture. It relies on massive thread and data parallelism, and fast on-chip memory. This processor operates in standalone mode, booting an off-the-shelf Linux operating system. The KNL peak performance is very high - approximately 3 Tflops in double precision and 6 Tflops in single precision - but sustained performance depends critically on how well all parallel features of the processor are exploited by real-life applications. We assess the performance of this processor for Lattice Boltzmann codes, widely used in computational fluid-dynamics. In our OpenMP code we consider several memory data-layouts that meet the conflicting computing requirements of distinct parts of the application, and sustain a large fraction of peak performance. We make some performance comparisons with other processors and accelerators, and also discuss the impact of the various memory layouts on energy efficiency.

READ FULL TEXT
research
04/05/2018

Energy-efficiency evaluation of Intel KNL for HPC workloads

Energy consumption is increasingly becoming a limiting factor to the des...
research
01/21/2020

Lattice QCD on a novel vector architecture

The SX-Aurora TSUBASA PCIe accelerator card is the newest model of NEC's...
research
03/20/2017

Parallel Sort-Based Matching for Data Distribution Management on Shared-Memory Multiprocessors

In this paper we consider the problem of identifying intersections betwe...
research
09/03/2017

Generating Custom Code for Efficient Query Execution on Heterogeneous Processors

Processor manufacturers build increasingly specialized processors to mit...
research
09/01/2020

A Survey on Recent Hardware Data Prefetching Approaches with An Emphasis on Servers

Data prefetching, i.e., the act of predicting application's future memor...
research
12/22/2021

DarkGates: A Hybrid Power-Gating Architecture to Mitigate the Performance Impact of Dark-Silicon in High Performance Processors

To reduce the leakage power of inactive (dark) silicon components, moder...
research
07/12/2019

Simulating Nonlinear Neutrino Oscillations on Next-Generation Many-Core Architectures

In this work an astrophysical simulation code, XFLAT, is developed to st...

Please sign up or login with your details

Forgot password? Click here to reset