DSAC: Low-Cost Rowhammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm
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DRAM has scaled to achieve low cost per bit and this scaling has decreased Rowhammer threshold. Thus, DRAM has adopted Target-Row-Refresh (TRR) which refreshes victim rows that can possibly lose stored data due to neighboring aggressor rows. Accordingly, prior works focused on TRR algorithm that can identify the most frequently accessed row, Rowhammer, to detect the victim rows. TRR algorithm can be implemented in memory controller, yet it can cause either insufficient or excessive number of TRRs due to lack of information of Rowhammer threshold and it can also degrade system performance due to additional command for Rowhammer mitigation. Therefore, this paper focuses on in-DRAM TRR algorithm. In general, counter-based detection algorithms have higher detection accuracy and scalability compared to probabilistic detection algorithms. However, modern DRAM extremely limits the number of counters for TRR algorithm. This paper demonstrates that decoy-rows are the fundamental reason the state-of-the-art counter-based algorithms cannot properly detect Rowhammer under the area limitation. Decoy-rows are rows whose number of accesses does not exceed the number of Rowhammer accesses within an observation period. Thus, decoy-rows should not replace Rowhammer which are in a count table. Unfortunately, none of the state-of-the-art counter-based algorithms filter out decoy-rows. Consequently, decoy-rows replace Rowhammer in a count table and dispossess TRR opportunities from victim rows. Therefore, this paper proposes `in-DRAM Stochastic and Approximate Counting (DSAC) algorithm', which leverages Stochastic Replacement to filter out decoy-rows and Approximate Counting for low area cost. The key idea is that a replacement occurs if a new row comes in more than a minimum count row in a count table on average so that decoy-rows cannot replace Rowhammer in a count table.
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