Circuits: An abstract viewpoint

06/16/2020 ∙ by Andreas Blass, et al. ∙ University of Michigan 0

Our primary purpose is to isolate the abstract, mathematical properties of circuits – both classical Boolean circuits and quantum circuits – that are essential for their computational interpretation. A secondary purpose is to clarify the similarities and differences between the classical and quantum situations. The general philosophy in this note is to include the mathematically essential aspects of circuits but to omit any of the additional structures that are usually included for convenience. We shall, however, retain the assumption that circuits are finite; this assumption does no harm to the applicability of our approach and is necessary for some of our work.

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1. Introduction

As we worked on Circuit Pedantry [1], we tried to figure out the appropriate level of abstraction for Boolean and quantum circuits. There is a natural tendency in the sciences, but especially in mathematics, to abstract away as many details as possible. This celebrated tendency is fruitful but it may also be fraught with troubles of various kinds.

The story goes that Plato defined man as featherless biped, abstracting from man’s many other properties, but Diogenes plucked the feathers from a cock and brought it to Plato saying: “Here’s your man.”

A more recent example is Cantor’s definition of sets. Cantor imposed no restrictions on what the elements of a set can be or how they are collected into a whole. The notion of set simplified mathematical analysis, enabled the development of logic and topology, etc. But it also led to paradoxes.

Here is a more pedestrian example which is closer to Circuit Pedantry. A finite matrix can be defined as an indexed set where and are finite sets indexing rows and columns. Normally the rows are linearly ordered and so are the columns. But the notion of finite matrix makes perfect sense without those orderings. That is, until you want to draw a matrix on a whiteboard or on paper.

Still, there are advantages in dealing with sets and indexed sets rather than linearly ordered sets. Think of relational databases where relational tuples are unordered, which simplifies theory [8] and improves practice [6] by eliminating a most important source of implementation dependence.

The set-based approach supports the most expressive polynomial-time computation model in the literature where machines do not distinguish between isomorphic structures [3, 4, 7]. Some complexity-theoretic advantages of the set-based approach are demonstrated in [5].

In Circuit Pedantry, we restrained our own tendency to abstract and adopted the traditional approach. In that approach, the input nodes are ordered in an arbitrary way and — in the case of quantum circuits (and balanced Boolean circuits) — one fixes a bijection between incoming and outgoing edges for every gate. As a result, there are definite timelines from the input nodes to output nodes. This allowed us to use traditional circuit diagrams as in, for example, [9] and hopefully to make that paper more readable.

But before we restrained our tendency to abstract, we indulged it for a little while. There is elegance and mathematical utility in the more abstract view. We are using the abstract view in our forthcoming paper on Quantum Circuits with Classical Channels [2] and we illustrate it here.

Our primary purpose in the present paper is to isolate the abstract, mathematical properties of circuits — both classical Boolean circuits and quantum circuits — that are essential for their computational interpretation. A secondary purpose is to clarify the similarities and differences between the classical and quantum situations.

Our general philosophy in this note is to include the mathematically essential aspects of circuits but to omit any of the additional structures that are usually included for convenience. We shall, however, retain the assumption, satisfied in theoretical as well as applied work, that circuits are finite. This assumption does no harm to the applicability of our approach and is necessary for some of our work.

In the rest of this introduction, we describe how we want to view circuits. Precise details will be given in later sections.

Inputs and outputs, whether of a whole circuit or of a single gate, will be families (of Boolean values or of quantum states, usually qubits and possibly entangled) indexed by some finite sets. It is customary to index inputs and outputs by natural numbers, thereby imposing a linear ordering on the inputs and another linear ordering on the outputs. When the number of inputs equals the number of outputs, we thereby obtain a particular bijection between the inputs and outputs. Although such bijections are useful for drawing circuits, we shall see that none of this customary extra structure — numerical indexes, linear orders, particular bijections — is essential for mathematical purposes; indeed none of this structure will appear in the formal development below. Any gate

will have a finite set of input labels and a finite set of output labels, but there will be no additional structure or assumptions on these sets. (We use the Greek letters iota and omicron for input and output of gates, in order to keep available for other uses.)

In the case of Boolean gates, the whole input will be an -indexed family of Boolean values, i.e., an element of , and the output will be an element of

. In the case of quantum gates, the input and output will be vectors in

and , respectively, where is our basic Hilbert space, usually , the state space for a qubit.

Similarly, the circuit as a whole will have input nodes indexed by a finite set and output nodes indexed by another finite set , with no additional structure or assumptions. The input to such a circuit will be in in the Boolean case or in the quantum case. The output will be in in the Boolean case or in the quantum case.

The connections between gates, inputs, and outputs will also be described in what we believe to be the simplest reasonable way. Wherever a value (Boolean or quantum) is needed, there will be a pointer to a provider for that value. A value is needed at each input position of a gate and at each output node of the whole circuit. Potential providers for these values are the circuit’s input nodes and the gates’ output positions. We call the places where a value is needed “consumers” and the places where a value can be obtained “producers”. So the wiring of our circuits will be given by a “provider” function from consumers to producers, giving for each consumer a producer expected to supply the value needed by .

2. Preliminaries

Throughout this paper we shall need to work with families indexed by arbitrary finite sets, in contexts where indexing by natural numbers is more common and provides a specific ordering for the elements of the family. This preliminary section is devoted to describing how our more general sort of indexing works and fixing our notation for it.

Convention 1.

Throughout this paper, index sets are assumed to be finite.

An -indexed family is a function with domain . The usual notations for the value of at are and . The family itself is usually written or . The ’s are called the elements or components of the family.

When the index set is , one may write such an indexed family as and call it an -tuple.

We use the notation for the disjoint union of a family of sets, defined as

In other words, we replace all the sets by pairwise disjoint, bijective copies, , and then we take the union of those copies. If the ’s are themselves pairwise disjoint, then we could have just taken their union without copying, and we may tacitly identify that union with the official disjoint union defined above. Even when the ’s are not disjoint, we may tacitly identify elements of with the corresponding elements of , relying on the context to provide the correct .

When the index set is , one may write the disjoint union as

In particular, we have the binary operation as in .

The (Cartesian) product of a family is defined as the collection of those -indexed families whose elements are taken from the corresponding sets . That is,

As in the case of disjoint unions, alternative notations may be used when , namely

In particular, we have the binary operation as in .

Similar conventions apply to the tensor product of vector spaces. The tensor product of an indexed family

of vector spaces can be defined as the vector space generated by the elements of , considered as formal symbols, modulo the relations that make the generators linear functions of each component when the other components are held fixed.

The precise definitions will be given in a moment, but let us first give an orienting example with

. A typical generator would, in the context of tensor products, often be written as , and a fairly typical relation would be the distributivity equation

To describe these relations in more detail and in full generality, it is convenient to introduce a bit of notation. If is an indexed family, if , and if is an arbitrary entity, then we write “ but ” for the -indexed family where for all but . That is, we modify the original famiiy by changing the -component to . Then the linearity relations for the tensor product are, first, for all and all ,

and second, for all , all , and all scalars ,

We use the notation for this tensor product. As before, when , we have the alternative notations

and we have the binary operation as in .

When people work with numerical index sets and with the binary operations , , and , they make extensive (but often tacit) use of the commutative and associative laws (up to canonical isomorphism) for these operations, and the main effect of these laws is to render the numerical indexing irrelevant. In our general indexed context, these laws take on quite different forms. Commutativity in the numerical-indexed context allows one to change the order of the operands, but our operands don’t come with an order. Associativity in the numerical context allows one to regard operations on three or more operands as built up from binary operations in various ways, but we have defined the -ary and in fact -ary operations directly, not in terms of binary ones. We list below the more general laws governing our more general operations. In each case, the isomorphisms indicated by are obvious and will be referred to as canonical. We leave the routine verifications to the reader.

Suppose is a bijection. Then any -indexed family, being a function with domain , can be composed with to produce an -indexed family, with the same components but differently indexed. In symbols, composition with transforms into . Then we have, for any families of sets and of vector spaces,

That is, up to canonical isomorphisms, re-indexing doesn’t change disjoint unions, Cartesian products, and tensor products.

Now suppose is an -indexed family of index sets , and let be the disjoint union of all the (remember that elements of have the form with and ). Then we have, for any -indexed families of sets and of vector spaces,

We shall sometimes simplify notation by omitting mention of the canonical bijections and isomorphisms above. For example, if and , then we may identify with , omitting mention of the canonical isomorphism arising from the bijection that sends to , respectively. In detail, let . Then

Consider two -indexed families of sets and and an -indexed family of functions . These functions induce functions on disjoint unions and Cartesian products

and

Similarly, linear transformations between vector spaces

induce a linear transformation of the tensor products,  , sending each generator of the former space to the generator of the latter. It is easy to check, using the linearity of the ’s, that this mapping of the generators respects the defining relations of the tensor product and thus gives a well-defined linear transformation of the tensor products.

Remark 2.

For category-minded readers, we mention that and are functors from -indexed families of sets to sets. In fact, they are the left and right adjoints, respectively, of the functor that sends any set to the -indexed family all of whose components are . Similarly, is a functor from -indexed families of vector spaces to vector spaces. The canonical isomorphisms indicated earlier are natural isomorphisms in the category-theoretic sense.

3. Boolean Circuits

Definition 3.

A Boolean gate type is a triple consisting of two finite sets and and a function . We call the set of input labels, the set of output labels, and the function of the gate type.

In this section, all gate types under consideration will be Boolean, so we omit “Boolean” and just call them gate types.

People often restrict the labels to be natural numbers. This makes it easier to write elements of and , but it has no mathematical significance.

Definition 4.

A Boolean circuit consists of

  • a finite set of input nodes,

  • a finite set of output nodes,

  • a finite set of gates,

  • an assignment of a gate type to each gate , and

  • a provider function as described below.

By producers we mean input nodes and triples of the form where is a gate of the circuit and is one of its output labels (). We call such a triple an output port of the gate . By consumers we mean output nodes and triples of the form where is a gate of the circuit and is one of its input labels (). We call such a triple an input port of the gate . Producers and consumers are called nodes of the circuit.

The provider function is a function from consumers to producers subject to the following requirement. We say that a gate is a direct prerequisite for another gate and we write if maps (at least) one of the input ports of to an output port of . We require that the relation be acyclic.

To simplify terminology and notation, we shall sometimes refer to providers of a gate when we mean providers of that gate’s input ports. Thus, if and only if some provider of is an output port of .

Notation 5.

When is a gate, we abbreviate as .

In view of the assumption that our circuits are finite, the requirement that be acyclic is equivalent to requiring that it be a well-founded relation. We use the word prerequisite without “direct” and the notation for the transitive closure of ; thus is a strict partial order.

The intuition behind the definition is as follows. Each gate , given the set of input labels, the set of output labels, and the Boolean function , reads an input in from its input ports, applies , and puts the result in at its output ports. The inputs here, at the input ports of , are simply retrieved from the corresponding nodes as given by the provider function . The gate consumes its inputs and produces its outputs; hence the “producer” and “consumer” terminology. The input nodes of the circuit, the elements of , can also provide inputs for gates, so they count as producers. The output nodes can retrieve values computed by gates or supplied in the input (as given by ) and exhibit them as the result of the circuit’s computation. This intuition is formalized in the following theorem.

Theorem 6.

Let a circuit be given along with an assignment of Boolean values to its input nodes, i.e., an element of . Then there is a unique function assigning to each node of the circuit a Boolean value subject to the following requirements.

  1. For input nodes , we have .

  2. For consumers , we have (i.e., consumer nodes just retrieve bits from their providers).

  3. For any gate , its -tuple of outputs,

    is the result of applying its function to its -tuple of inputs

Proof.

Clause (2) reduces the problem to defining on producers. Rewriting clause (3) in terms of producers,

we find that this and clause (1) constitute a definition of (on producers) by recursion on the direct prerequisite relation . Since this relation is well-founded, the recursion has a unique solution. ∎

According to the theorem, any gives rise, via the function , to a uniquely defined element , namely the restriction of to output nodes. In this way, the given circuit defines a function , the function computed by the circuit.

4. Balanced Boolean Circuits

In preparation for the discussion of quantum circuits, we introduce a special class of Boolean circuits, defined in [1] and designed to be subject to some of the restrictions that become necessary when one moves from the classical world to the quantum world.

Definition 7.

A Boolean circuit is balanced if all of its gate functions and its provider function are bijective.

Since bijective functions are invertible, bijectivity of all the gate functions says that the circuit is composed entirely of reversible gates.

Injectivity of the provider function means that each input bit and each bit produced by a gate can be used (or output) only once. This amounts to saying that the gates and inputs have no fan-out.

Surjectivity of means that input bits and bits produced by gates must be used, either in computations by subsequent gates or as output from the circuit. They cannot simply be discarded. Intuitively, this seems to be a mild requirement because, if a circuit did discard some of its produced bits, then we could simply regard those bits as additional output. In other words, if were merely injective and not bijective, we could enlarge and extend to map the new elements of to those producers that were missing from the image of .

We record some immediate consequences of the definition.

First, if is a gate in a balanced circuit, then, since is a bijection, the index sets and must have the same cardinality; each gate has equally many input as output ports.111This observation would remain valid if each consumer received from its provider not a bit but an element of some other, fixed alphabet . But it would not be valid if the alphabet were allowed to be different for different . For example, if a gate has hexadecimal inputs and binary outputs, then in order for to be bijective, must have four times as many elements as .

Summing that equality over all gates, we find that the total number of gate input ports, which is the number of consumers except for the circuit’s output nodes, must equal the total number of gate output ports, which is the number of producers except for the circuit’s input nodes.

But the provider function is also required to be a bijection, so the number of consumers equals the number of producers, without the exceptions. Therefore, the exceptions must match, i.e., the circuit has as many input nodes as output nodes: .

5. Quantum Gates and Circuits

We turn now to the description of circuits for quantum computation. For simplicity and to maintain similarity with the Boolean case discussed in the preceding sections, we make two assumptions about our circuits. First, we assume that the capacity of each connection is a qubit, the quantum analog of a bit, rather than a more complicated quantum system (which would be analogous to transmitting more than one bit, or perhaps an element of some other alphabet, in the Boolean case). Second, we assume that each gate represents a unitary operator; that is, we do not permit more complicated222The general notion of quantum measurement, as defined in, for example [9], allows measurements with only one possible outcome; such a measurement amounts to a unitary operator acting on the state. measurements. The second assumption is eliminated in [2].

Under these assumptions, quantum circuits differ from Boolean circuits in the following ways. First, the no-cloning theorem means that at most one consumer can use the output of any one producer, i.e., a producer’s output cannot be duplicated to supply multiple consumers. Thus, the provider function of a quantum circuit is necessarily one-to-one. Furthermore, just as in our earlier discussion of Boolean circuits, we may assume that is surjective, i.e., that whatever is produced is also consumed; we just treat any unconsumed production as additional output. Thus, we may assume that the provider function is bijective.

Second, the gate functions in a quantum circuit are not Boolean functions but unitary transformations of Hilbert spaces. Specifically, if and are, as before, the sets of input and output labels, respectively, of , then unitarily maps to , where is the one-qubit Hilbert space . Since unitary transformations exist only between Hilbert spaces of equal dimension, we conclude, just as in the balanced Boolean case, that for every gate and that therefore also . In these respects, quantum circuits look like balanced Boolean circuits.

Third, and most important, both for the utility of quantum computation and for our work below, is entanglement. In the Boolean case, the inputs to a gate were separate bits, obtained independently from the appropriate providers. In the quantum case, it is usually not the case that a gate’s input qubits are independent. They may be entangled with each other and also with other qubits that the gate in question does not directly work with. This entanglement can be seen as the source of the power of quantum computation; it is also the source of some of the complexity in our formal development of the theory.

We now begin the formal development, interspersed with commentary to clarify the underlying intentions.

Notation 8.

We use to denote the qubit Hilbert space .

Definition 9.

A quantum gate type is a triple consisting of two finite sets and and a unitary transformation . We call the set of input labels, the set of output labels, and the operator of the gate type.

As mentioned above, unitarity of in this definition forces and to have the same cardinality. They need not, however, be the same set, nor need there even be a canonical bijection between them. In many pictures of quantum circuits, a particular bijection would be implicit in the layout of the circuit on the page, but neither the layout nor the bijection is canonical, and neither is relevant in our abstract context.

Definition 10.

A quantum circuit consists of

  • a finite set of input nodes,

  • a finite set of output nodes,

  • a finite set of gates,

  • an assignment of a gate type to each gate , and

  • a bijective provider function from consumers to producers such that the direct prerequisite relation and therefore also its transitive closure are acyclic.

In the last clause of this definition, “consumer”, “producer”, , and are to be understood exactly as in the case of Boolean circuits. Thus, the only difference between quantum circuits and balanced Boolean circuits is that each gate has a unitary operator instead of a Boolean bijection . We also carry over from the Boolean case Notation 5 and the terminology “providers of a gate”.

The intuition behind the behavior of a quantum circuit is similar in some respects to that for Boolean circuits but quite different in other respects.

As before, a gate will obtain its input from its providers and act on that input to produce its output. It is, however, important not to misinterpret “retrieve” in our description of the Boolean case, “inputs … are simply retrieved from the corresponding provider nodes.” “Retrieve” must not mean “copy” here because quantum states, unlike classical bits, cannot simply be copied. We should rather regard what is consumed at a gate to be the same as (not a copy of) what is produced at its provider nodes.

Furthermore, it can be misleading to speak of the state vector on which a gate acts or the state vector that it produces. These states will usually be entangled with other parts of the circuit that are not directly involved with . Even taking into account that the bits in of the Boolean situation must be replaced by vectors in in the quantum situation, we cannot expect to assign a state vector in to each node of the circuit;333We could assign a mixed state to each node by taking a suitable trace of the global state. The trace operation could, however, lose a great deal of information and could, in fact, ruin the usefulness of quantum computation. The reason is that tracing can destroy the entanglement on which quantum computation depends for its power. we cannot expect a direct analog of Theorem 6. Instead of keeping track of separate bits at all the nodes, we must now keep track of the evolution of a global quantum state. Specifically, it makes good sense to speak of the input state where the circuit’s computation begins, of the final state after the computation is complete, and of various intermediate states, related to each other by the action of the gates. The following definition serves to describe the contexts in which such a global state makes sense.

Definition 11.

A stage of a quantum circuit is a set of gates closed under direct prerequisites, i.e., if and then . The exits of a stage are those input nodes in and output ports of gates in that are not consumed in (i.e., are not in for any gate in ). We write for the set of exits of a stage .

The formal notion of stage introduced in this definition is intended to model the informal notion of a stage during a computation, that is, a moment when some gates have already fired and the rest are still waiting to fire. The set consists of the gates that have already fired, the “past” of the stage in question; the complementary set of all gates not in is the “future” of the stage. The requirement, in the definition, that be closed under formalizes the idea that a gate cannot be fired until all its prerequisites have been fired; firing a gate requires the availability of its input. Note that closure under immediately implies closure under .

The exits of a stage are those producers which have already produced their outputs but have not yet had those outputs consumed. These outputs constitute the information created (or supplied as input) in the past and destined to be consumed in the future.

In terms of typical pictures of circuits, a stage can be depicted as a cut through the circuit, separating the gates already fired (those in ) from the rest of the gates, which still await firing in the future. The circuit’s input nodes in would be depicted as being on the past side of the cut (where is) while the output nodes in are on the future side. The edges in the picture that cross the cut are those whose past ends are in (more precisely, these ends are output ports of gates in ) or and whose future ends are not. When people use such pictures, they often think in terms of a global state associated to such a cut.

In our abstract picture, we don’t directly refer to edges, but our exits correspond to the past ends of the edges crossing the cut (and their pre-images under correspond to the future ends of those edges).

If one were to actually cut a circuit into a past circuit (input nodes and gates in ) and a future circuit (output nodes and gates not in ), then would amount to providers for outputs of the past fragment and to inputs for the future fragment. The terminology “exit” is intended to suggest the operation of these nodes in producing output from the fragment.

Definition 12.

Let be a stage of a quantum circuit and let be a gate not in . We say that is ready at if all its direct prerequisites (and therefore all its prerequisites) are in . In this case, is also a stage, and we denote it by .

The idea behind this definition is that, after the gates in have fired, is ready to be fired next. Firing it would then bring the computation to the stage . There may, of course, be several gates that are ready at , and any one (or more) of them could be fired next.

Notice for future reference that, if a gate is ready at a stage , then

that is, firing after stage adds to the exits the output ports of and removes the producers that are providers for . The following proposition is just a reformulation of this observation in a form that will be convenient later.

Proposition 13.

Let be a stage, a gate that is ready at , and . Then

and

We take advantage of this proposition to simplify some of our notation as follows.

Notation 14.

Let , , and be as in Proposition 13. We identify with and thereby identify with , using the bijection for . Similarly, we identify with , using the bijection for . In other words, we omit mention of those two bijections and the maps they induce on the tensor powers of .

It is also worth noting the two extreme cases of stages. The empty set is a stage, the stage at which no gate has yet fired. Only the circuit’s input is available at this stage; formally, . The set of all gates is also a stage, the stage after all the gates have fired. Its exits are the providers of the output nodes.

The next theorem formalizes the idea that, once an input state for the circuit is specified in , there is a well-defined global state at each stage, where these global states for different stages are related to each other by the action of the gates. In very abbreviated form, the theorem could be summarized as saying that, given a circuit and an input state, there is a well-defined computation of that circuit on that input. It is the quantum analog of Theorem 6.

Theorem 15.

Let a quantum circuit be given along with an input state vector . Then there is a unique function assigning to each stage of the circuit a state vector subject to the following requirements.

  1. For the initial stage, we have .

  2. If is ready at ,then

    where is as in Proposition 13 and is the identity operator on .

Requirement (2) in the theorem says, intuitively, that the gate acts on to produce by applying its operator to the relevant part of this state, which, thanks to the identifications in Notation 14, is . It does nothing to the rest of , namely, the part in .

Proof.

Fix, for the whole proof, the circuit and the initial state .

To prove uniqueness of , we proceed by induction on the cardinality of . If this cardinality is 0, then requirement (1) in the theorem ensures uniqueness of .

Consider now a stage that contains at least one gate. Because is acyclic, must contain a gate that is not a prerequisite for any other gate in . Deletion of from our stage thus produces another stage, which we call and which, by induction hypothesis, has a uniquely defined . But then , and is uniquely determined by requirement (2) of the theorem. This completes the induction step and thus completes the uniqueness proof.

It remains to prove the existence part of the theorem. The proof of uniqueness given above implicitly provides a construction that almost proves existence. Specifically, the uniqueness proof obtains by removing the gate to obtain with and then acting by on . This is, of course, obtained in the same way by removing a gate to get , and continuing in the same way until one gets to the empty stage. Starting from , we apply the gates (or rather their operators ) in the reverse of the order described above. That is, we have, using the notation for ,

for an enumeration of the gates in that is coherent with in the sense that the prerequisites of any gate appear earlier than the gate itself, i.e., if then . (Intuitively, this enumeration is a sequentialization of the circuit, in the sense that fires first, then , etc.) Note for future reference, that coherence with is the same as coherence with the transitive closure .

The issue that still needs to be addressed is that there are, in general, several ways choose the gate in the induction step of the uniqueness proof. We need that all enumerations of the gates in coherent with produce the same .

Once this is done, it will be clear that so defined satisfies the requirements in the theorem. Indeed, requirement (1) is immediate, being the case of the definition where no operators act on . To check requirement (2), it suffices to apply the definition with an arbitrary coherent enumeration for and, for , the enumeration obtained by appending as the last gate.

To show that any two coherent enumerations of lead to the same , we invoke Theorem 32 from [1, §4.2]: If two enumerations of a finite partially ordered set are both coherent with the partial order, then one can be obtained from the other by a sequence of interchanges of two consecutive elements, in such a way that the enumerations at all steps of the process are coherent with the partial order. We apply this result to the finite set of gates and the partial order . We thus find that it suffices to consider two enumerations that differ by interchanging just two consecutive elements.

Suppose, therefore, that one enumeration is as above and the other is obtained from it by interchanging and . These two enumerations give formulas for that differ only in two of the factors of the form that are being composed, and those two factors are adjacent. It is tempting to say that we just need to prove that those factors commute, but the situation is a bit more subtle because each of the two relevant ’s depends on the preceding stages.

Let be the stage just before either of the two critical gates and acts, i.e., . Then can be split into three disjoint subsets: the part of providers for the input ports of , the analogous part for , and the rest of . Formally, we observe that and are disjoint, because is bijective, and we define .

Let us consider the action of the critical gates and with respect to the original enumeration and, in particular, let us look at the and at those stages. In our formula for , we determined by referring to Proposition 13 with the gate and the stage just before the action of . In our present context, that stage is what we are calling , and is therefore . Then is determined by again referring to Proposition 13 but now with the gate and the stage . So is This could, a priori, differ from , because we now have rather than . Fortunately, there is no real difference. To see this, first consult Proposition 13 to see that differs from only by (1) removal of ports that are in and (2) addition of output nodes of . The removals in (1) make no difference for us, because is disjoint from . The additions in (2) also make no difference for the following, less trivial reason. Recall that the enumeration with and interchanged is also coherent with . So we know that ; no output node of can be the provider for an input node of . And this is just what we need to ensure that the additions (2) don’t matter.

Thus, for the enumeration , we have and . An exactly analogous argument gives the same ’s for the alternative ordering . That is, the same two operators and occur in both versions of the formula for but in reversed order. So all we still need to prove is that these two operators commute. Fortunately, that is easy. The first is and the second is . These commute because, in each of the three tensor factors, at least one of them is the identity operator. This completes the proof that is well-defined and thus completes the proof of the theorem. ∎

The following corollary records information implicit in the proof of Theorem 15, namely that is, for each fixed , obtained from in a uniform and unitary manner.

Corollary 16.

For every quantum circuit and every stage , there is a unitary operator sending each input state vector to the described in Theorem 15.

Proof.

The desired unitary operator is the operator

used in the proof of Theorem 15 and shown there to be independent of the sequentialization of the circuit. ∎

Given a quantum circuit and an input state , Theorem 15 provides a complete description of the resulting computation. That includes, in particular, the final result of these computations, namely where is the set of all the gates in the circuit. But it also includes intermediate results for all stages , and these tell what happens, step-by-step, in any sequentialization of the computation. Furthermore, even if one does not fully sequentialize the computation but allows several gates to act simultaneously, then, first, any simultaneously acting gates must be incomparable under because a gate can act only after its inputs have been produced by its prerequisite gates, and, second, after any part of such a computation has taken place, the gates in that part constitute a stage. Theorem 15 thus provides a well-defined state after that part of the computation.

Remark 17.

Theorems 6 and 15 say, in the Boolean and quantum cases respectively, that a circuit and initial data produce a well-defined computation, but the detailed formulations differ significantly. Theorem 6 provides a separate bit for every node . We have already explained that it is unreasonable to expect an exact analog for quantum circuits, providing a separate qubit for every node, because the qubits can be entangled. This is why Theorem 15 assigns quantum states not to individual nodes but to (the exits of) whole stages.

In the opposite direction, though, we can easily obtain a Boolean analog of the quantum result. Observe that the definitions of “stage”, “exit”, “ready”, and “” can be applied verbatim to Boolean circuits. Furthermore, Proposition 13 remains correct and we can make identifications like those in Notation 14 for products of sets instead of tensor products of vector spaces. In light of these observations, we can transcribe Theorem 15 to the Boolean situation, obtaining the following corollary of Theorem 6.

Corollary 18.

Let a Boolean circuit be given along with an input . Then there is a unique function assigning to each stage of the circuit a state subject to the following requirements.

  1. For the initial stage, we have .

  2. If is ready at , then

    where is as in Proposition 13 and is the identity function on .

Proof.

The desired in this corollary is the function assigning to each the bit from Theorem 6. The required properties of in the present corollary follow easily from the properties of the earlier in Theorem 6. ∎

References

  • [1] Andreas Blass and Yuri Gurevich, “Circuit pedantry,” Bulletin of the European Association for Theoretical Computer Science 129 October 2019, https://arxiv.org/abs/1910.06145
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