
High Performance GPU Code Generation for MatrixMatrix Multiplication using MLIR: Some Early Results
This report presents some early results on code generation targeting ten...
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NVIDIA Tensor Core Programmability, Performance & Precision
The NVIDIA Volta GPU microarchitecture introduces a specialized unit, ca...
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Fireiron: A Scheduling Language for HighPerformance Linear Algebra on GPUs
Achieving highperformance GPU kernels requires optimizing algorithm imp...
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Flexible Performant GEMM Kernels on GPUs
General Matrix Multiplication or GEMM kernels take centre place in high ...
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Automatic acceleration of Numpy applications on GPUs and multicore CPUs
Frameworks like Numpy are a popular choice for application developers fr...
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Not Half Bad: Exploring HalfPrecision in Graph Convolutional Neural Networks
With the growing significance of graphs as an effective representation o...
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CLTune: A Generic AutoTuner for OpenCL Kernels
This work presents CLTune, an autotuner for OpenCL kernels. It evaluate...
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Automatic Kernel Generation for Volta Tensor Cores
A commonly occurring computation idiom in neural networks is to perform some pointwise operations on the result of a matrix multiplication. Such a sequence of operations is typically represented as a computation graph in deep learning compilers. When compiling to a GPU target, these computations can be individually mapped to manually tuned implementations provided by libraries such as cuBLAS and cuDNN. These libraries also provide offtheshelf support for targeting tensor cores in NVIDIA GPUs, which can lead to huge performance boosts through their specialized support for mixedprecision matrix math. Alternatively, tensor cores can be programmed directly using CUDA APIs or inline assembly instructions, which opens up the possibility of generating efficient CUDA kernels automatically for such computations. Automatic kernel generation is particularly crucial when it is beneficial to generate efficient code for an entire computation graph by fusing several operations into a single device function instead of invoking a separate kernel for each of them. Polyhedral compilation techniques provide a systematic approach for the analysis and transformation of a sequence of affine loopnests. In this paper, we describe a polyhedral approach to generate efficient CUDA kernels for matrix multiplication using inline assembly instructions for programming tensor cores on NVIDIA Volta GPUs. Furthermore, we build on this approach to generate fused kernels for computation sequences involving matrix multiplication and pointwise operations such as bias addition, ReLU activation etc. Experimental evaluation of these techniques show that automatically generated kernels can provide significantly better performance than manually tuned library implementations, with speedups ranging up to 2.55X.
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