ARM2GC: Succinct Garbled Processor for Secure Computation

02/08/2019
by   Ebrahim M. Songhori, et al.
0

We present ARM2GC, a novel secure computation framework based on Yao's Garbled Circuit (GC) protocol and the ARM processor. It allows users to develop privacy-preserving applications using standard high-level programming languages (e.g., C) and compile them using off-the-shelf ARM compilers (e.g., gcc-arm). The main enabler of this framework is the introduction of SkipGate, an algorithm that dynamically omits the communication and encryption cost of the gates whose outputs are independent of the private data. SkipGate greatly enhances the performance of ARM2GC by omitting costs of the gates associated with the instructions of the compiled binary, which is known by both parties involved in the computation. Our evaluation on benchmark functions demonstrates that ARM2GC not only outperforms the current GC frameworks that support high-level languages, it also achieves efficiency comparable to the best prior solutions based on hardware description languages. Moreover, in contrast to previous high-level frameworks with domain-specific languages and customized compilers, ARM2GC relies on standard ARM compiler which is rigorously verified and supports programs written in the standard syntax.

READ FULL TEXT

page 1

page 2

page 3

page 4

research
11/15/2021

Design and Evaluation Frameworks for Advanced RISC-based Ternary Processor

In this paper, we introduce the design and verification frameworks for d...
research
01/30/2018

PrivPy: Enabling Scalable and General Privacy-Preserving Computation

We introduce PrivPy, a practical privacy-preserving collaborative comput...
research
12/27/2019

EVA: An Encrypted Vector Arithmetic Language and Compiler for Efficient Homomorphic Computation

Fully-Homomorphic Encryption (FHE) offers powerful capabilities by enabl...
research
06/24/2019

On The Performance of ARM TrustZone

The TrustZone technology, available in the vast majority of recent ARM p...
research
05/06/2021

Parallelized sequential composition, pipelines, and hardware weak memory models

Since the introduction of the CDC 6600 in 1965 and its `scoreboarding' t...
research
07/20/2023

The best multicore-parallelization refactoring you've never heard of

In this short paper, we explore a new way to refactor a simple but trick...

Please sign up or login with your details

Forgot password? Click here to reset