An Efficient Communication Protocol for FPGA IP Protection

01/21/2021
by   Farzane Khajuyi, et al.
0

We introduce a protection-based IP security scheme to protect soft and firm IP cores which are used on FPGA devices. The scheme is based on Finite State Machin (FSM) obfuscation and exploits Physical Unclonable Function (PUF) for FPGA unique identification (ID) generation which help pay-per-device licensing. We introduce a communication protocol to protect the rights of parties in this market. On standard benchmark circuits, the experimental results show that our scheme is secure, attack-resilient and can be implemented with low area, power and delay overheads.

READ FULL TEXT
research
12/02/2019

Securing Soft IP Cores in FPGA based Reconfigurable Mobile Heterogeneous Systems

The mobile application market is rapidly growing and changing, offering ...
research
11/08/2021

Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction

Semiconductor design houses rely on third-party foundries to manufacture...
research
06/09/2023

Protect Your Prompts: Protocols for IP Protection in LLM Applications

With the rapid adoption of AI in the form of large language models (LLMs...
research
02/12/2018

Cryptographically Secure Multi-Tenant Provisioning of FPGAs

FPGAs (Field Programmable Gate arrays) have gained massive popularity to...
research
06/25/2019

From IP ID to Device ID and KASLR Bypass (Extended Version)

IP headers include a 16-bit ID field. Our work examines the generation o...
research
12/21/2022

Device-Bind Key-Storageless Hardware AI Model IP Protection: A PUF and Permute-Diffusion Encryption-Enabled Approach

Machine learning as a service (MLaaS) framework provides intelligent ser...
research
12/10/2021

Protecting Your NLG Models with Semantic and Robust Watermarks

Natural language generation (NLG) applications have gained great popular...

Please sign up or login with your details

Forgot password? Click here to reset