Adding 32-bit Mode to the ACL2 Model of the x86 ISA

10/10/2018

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by Alessandro Coglio, et al.

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Centaur Technology Inc.

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The ACL2 model of the x86 Instruction Set Architecture was built for the 64-bit mode of operation of the processor. This paper reports on our work to extend the model with support for 32-bit mode, recounting the salient aspects of this activity and identifying the ones that required the most work.

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Adding 32-bit Mode to the ACL2 Model of the x86 ISA

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Adding 32-bit Mode to the ACL2 Model of the x86 ISA

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