A Bit-Parallel Deterministic Stochastic Multiplier

02/14/2023
by   Sairam Sri Vatsavai, et al.
0

This paper presents a novel bit-parallel deterministic stochastic multiplier, which improves the area-energy-latency product by up to 10.6×10^4, while improving the computational error by 32.2%, compared to three prior stochastic multipliers.

READ FULL TEXT
research
10/20/2016

Bit-pragmatic Deep Neural Network Computing

We quantify a source of ineffectual computations when processing the mul...
research
10/08/2022

Low Error-Rate Approximate Multiplier Design for DNNs with Hardware-Driven Co-Optimization

In this paper, two approximate 3*3 multipliers are proposed and the synt...
research
04/19/2020

On the decomposition of generalized semiautomata

Semi-automata are abstractions of electronic devices that are determinis...
research
04/21/2019

A Parallel Bitstream Generator for Stochastic Computing

Stochastic computing (SC) presents high error tolerance and low hardware...
research
11/16/2016

Efficient Parallel Verification of Galois Field Multipliers

Galois field (GF) arithmetic is used to implement critical arithmetic co...
research
05/27/2021

Computational modeling of the nonlinear stochastic dynamics of horizontal drillstrings

This work intends to analyze the nonlinear stochastic dynamics of drills...
research
01/03/2020

Low-cost Stochastic Number Generators for Stochastic Computing

Stochastic unary computing provides low-area circuits. However, the requ...

Please sign up or login with your details

Forgot password? Click here to reset