b'Saugata Ghose'

research

∙ 09/19/2022

Accelerating Neural Network Inference with Processing-in-DRAM: From the Edge to the Cloud

Neural networks (NNs) are growing in importance and complexity. A neural...

33 Geraldo F. Oliveira, et al. ∙

research

∙ 05/29/2022

Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases

Today's computing systems require moving data back-and-forth between com...

31 Geraldo F. Oliveira, et al. ∙

research

∙ 05/29/2022

Methodologies, Workloads, and Tools for Processing-in-Memory: Enabling the Adoption of Data-Centric Architectures

The increasing prevalence and growing size of data in modern application...

0 Geraldo F. Oliveira, et al. ∙

research

∙ 05/12/2022

SeGraM: A Universal Hardware Accelerator for Genomic Sequence-to-Graph and Sequence-to-Sequence Mapping

A critical step of genome sequence analysis is the mapping of sequenced ...

0 Damla Senol Cali, et al. ∙

research

∙ 04/24/2022

Enabling High-Performance and Energy-Efficient Hybrid Transactional/Analytical Databases with Hardware/Software Cooperation

A growth in data volume, combined with increasing demand for real-time a...

0 Amirali Boroumand, et al. ∙

research

∙ 11/03/2021

Extending Memory Capacity in Consumer Devices with Emerging Non-Volatile Memory: An Experimental Study

The number and diversity of consumer devices are growing rapidly, alongs...

0 Geraldo F. Oliveira, et al. ∙

research

∙ 06/10/2021

CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations

DRAM is the dominant main memory technology used in modern computing sys...

0 Lois Orosa, et al. ∙

research

∙ 05/26/2021

SIMDRAM: An End-to-End Framework for Bit-Serial SIMD Computing in DRAM

Processing-using-DRAM has been proposed for a limited set of basic opera...

0 Nastaran Hajinazar, et al. ∙

research

∙ 05/08/2021

DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks

Data movement between the CPU and main memory is a first-order obstacle ...

0 Geraldo F. Oliveira, et al. ∙

research

∙ 03/01/2021

Polynesia: Enabling Effective Hybrid Transactional/Analytical Databases with Specialized Hardware/Software Co-Design

An exponential growth in data volume, combined with increasing demand fo...

0 Amirali Boroumand, et al. ∙

research

∙ 03/01/2021

Mitigating Edge Machine Learning Inference Bottlenecks: An Empirical Study on Accelerating Google Edge Models

As the need for edge computing grows, many modern consumer devices now c...

60 Amirali Boroumand, et al. ∙

research

∙ 02/11/2021

BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows

Aggressive memory density scaling causes modern DRAM devices to suffer f...

0 Abdullah Giray Yağlıkçı, et al. ∙

research

∙ 12/22/2020

SIMDRAM: A Framework for Bit-Serial SIMD Processing Using DRAM

Processing-using-DRAM has been proposed for a limited set of basic opera...

0 Nastaran Hajinazar, et al. ∙

research

∙ 12/05/2020

A Modern Primer on Processing in Memory

Modern computing systems are overwhelmingly designed to move data to com...

0 Onur Mutlu, et al. ∙

research

∙ 09/17/2020

FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching

DRAM Main memory is a performance bottleneck for many applications due t...

0 Yaohua Wang, et al. ∙

research

∙ 09/16/2020

GenASM: A High-Performance, Low-Power Approximate String Matching Acceleration Framework for Genome Sequence Analysis

Genome sequence analysis has enabled significant advancements in medical...

0 Damla Senol Cali, et al. ∙

research

∙ 07/30/2020

Accelerating Genome Analysis: A Primer on an Ongoing Journey

Genome analysis fundamentally starts with a process known as read mappin...

0 Mohammed Alser, et al. ∙

research

∙ 05/19/2020

The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework

Computers continue to diversify with respect to system designs, emerging...

0 Nastaran Hajinazar, et al. ∙

research

∙ 07/26/2019

A Workload and Programming Ease Driven Perspective of Processing-in-Memory

Many modern and emerging applications must process increasingly large vo...

0 Saugata Ghose, et al. ∙

research

∙ 05/02/2019

Enabling Practical Processing in and near Memory for Data-Intensive Computing

Modern computing systems suffer from the dichotomy between computation o...

0 Onur Mutlu, et al. ∙

research

∙ 03/10/2019

Processing Data Where It Makes Sense: Enabling In-Memory Computation

Today's systems are overwhelmingly designed to move data to computation....

0 Onur Mutlu, et al. ∙

research

∙ 02/20/2019

Understanding the Interactions of Workloads and DRAM Types: A Comprehensive Experimental Study

It has become increasingly difficult to understand the complex interacti...

0 Saugata Ghose, et al. ∙

research

∙ 02/19/2019

Dataplant: In-DRAM Security Mechanisms for Low-Cost Devices

Low-cost devices are now commonplace and can be found in diverse environ...

0 Lois Orosa, et al. ∙

research

∙ 10/22/2018

Enabling Efficient RDMA-based Synchronous Mirroring of Persistent Memory Transactions

Synchronous Mirroring (SM) is a standard approach to building highly-ava...

0 Arash Tavakkol, et al. ∙

research

∙ 07/13/2018

Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation

Compared to planar (i.e., two-dimensional) NAND flash memory, 3D NAND fl...

0 Yixin Luo, et al. ∙

research

∙ 07/13/2018

What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study

Main memory (DRAM) consumes as much as half of the total system power in...

0 Saugata Ghose, et al. ∙

research

∙ 06/12/2018

Techniques for Efficiently Handling Power Surges in Fuel Cell Powered Data Centers: Modeling, Analysis, Results

Fuel cells are a promising power source for future data centers, offerin...

0 Yang Li, et al. ∙

research

∙ 05/17/2018

Recent Advances in DRAM and Flash Memory Architectures

This article features extended summaries and retrospectives of some of t...

0 Onur Mutlu, et al. ∙

research

∙ 05/16/2018

Recent Advances in Overcoming Bottlenecks in Memory Systems and Managing Memory Resources in GPU Systems

This article features extended summaries and retrospectives of some of t...

0 Onur Mutlu, et al. ∙

research

∙ 05/08/2018

Characterizing, Exploiting, and Mitigating Vulnerabilities in MLC NAND Flash Memory Programming

This paper summarizes our work on experimentally analyzing, exploiting, ...

0 Yu Cai, et al. ∙

research

∙ 05/08/2018

Read Disturb Errors in MLC NAND Flash Memory

This paper summarizes our work on experimentally characterizing, mitigat...

0 Yu Cai, et al. ∙

research

∙ 05/08/2018

SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure

This paper summarizes the SoftMC DRAM characterization infrastructure, w...

0 Hasan Hassan, et al. ∙

research

∙ 05/08/2018

LISA: Increasing Internal Connectivity in DRAM for Fast Data Movement and Low Latency

This paper summarizes the idea of Low-Cost Interlinked Subarrays (LISA),...

0 Kevin K. Chang, et al. ∙

research

∙ 05/08/2018

Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency

This paper summarizes our work on experimental characterization and anal...

0 Kevin K. Chang, et al. ∙

research

∙ 05/08/2018

Flexible-Latency DRAM: Understanding and Exploiting Latency Variation in Modern DRAM Chips

This article summarizes key results of our work on experimental characte...

0 Kevin K. Chang, et al. ∙

research

∙ 05/08/2018

Experimental Characterization, Optimization, and Recovery of Data Retention Errors in MLC NAND Flash Memory

This paper summarizes our work on experimentally characterizing, mitigat...

0 Yu Cai, et al. ∙

research

∙ 05/02/2018

Decoupling GPU Programming Models from Resource Management for Enhanced Programming Ease, Portability, and Performance

The application resource specification--a static specification of severa...

0 Nandita Vijaykumar, et al. ∙

research

∙ 04/30/2018

Mosaic: An Application-Transparent Hardware-Software Cooperative Memory Manager for GPUs

Modern GPUs face a trade-off on how the page size used for memory manage...

0 Rachata Ausavarungnirun, et al. ∙

research

∙ 04/30/2018

Holistic Management of the GPGPU Memory Hierarchy to Manage Warp-level Latency Tolerance

In a modern GPU architecture, all threads within a warp execute the same...

0 Rachata Ausavarungnirun, et al. ∙

research

∙ 02/07/2018

Zorua: Enhancing Programming Ease, Portability, and Performance in GPUs by Decoupling Programming Models from Resource Management

The application resource specification--a static specification of severa...

0 Nandita Vijaykumar, et al. ∙

research

∙ 02/01/2018

Enabling the Adoption of Processing-in-Memory: Challenges, Mechanisms, Future Research Directions

Poor DRAM technology scaling over the course of many years has caused DR...

0 Saugata Ghose, et al. ∙

research

∙ 11/28/2017

Errors in Flash-Memory-Based Solid-State Drives: Analysis, Mitigation, and Recovery

NAND flash memory is ubiquitous in everyday life today because its capac...

0 Yu Cai, et al. ∙

research

∙ 08/16/2017

Improving Multi-Application Concurrency Support Within the GPU Memory System

GPUs exploit a high degree of thread-level parallelism to hide long-late...

0 Rachata Ausavarungnirun, et al. ∙

research

∙ 06/27/2017

Using ECC DRAM to Adaptively Increase Memory Capacity

Modern DRAM modules are often equipped with hardware error correction ca...

0 Yixin Luo, et al. ∙

research

∙ 06/27/2017

Error Characterization, Mitigation, and Recovery in Flash Memory Based Solid-State Drives

NAND flash memory is ubiquitous in everyday life today because its capac...

0 Yu Cai, et al. ∙

research

∙ 06/10/2017

LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures

Processing-in-memory (PIM) architectures have seen an increase in popula...

0 Amirali Boroumand, et al. ∙

research

∙ 05/29/2017

Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms

The energy consumption of DRAM is a critical concern in modern computing...

0 Kevin K. Chang, et al. ∙

research

∙ 10/30/2016

Understanding and Exploiting Design-Induced Latency Variation in Modern DRAM Chips

Variation has been shown to exist across the cells within a modern DRAM ...

0 Donghyuk Lee, et al. ∙

Saugata Ghose

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