Satwik Patnaik | DeepAI

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∙ 03/24/2023

PoisonedGNN: Backdoor Attack on Graph Neural Networks-based Hardware Security Systems

Graph neural networks (GNNs) have shown great success in detecting intel...

0 Lilas Alrahis, et al. ∙

∙ 09/05/2022

Hide Seek: Seeking the (Un)-Hidden key in Provably-Secure Logic Locking Techniques

Logic locking protects an IC from threats such as piracy of design IP an...

0 Satwik Patnaik, et al. ∙

∙ 08/29/2022

Reinforcement Learning for Hardware Security: Opportunities, Developments, and Challenges

Reinforcement learning (RL) is a machine learning paradigm where an auto...

0 Satwik Patnaik, et al. ∙

∙ 08/26/2022

ATTRITION: Attacking Static Hardware Trojan Detection Techniques Using Reinforcement Learning

Stealthy hardware Trojans (HTs) inserted during the fabrication of integ...

0 Vasudev Gohil, et al. ∙

∙ 08/26/2022

DETERRENT: Detecting Trojans using Reinforcement Learning

Insertion of hardware Trojans (HTs) in integrated circuits is a pernicio...

0 Vasudev Gohil, et al. ∙

∙ 08/17/2022

Embracing Graph Neural Networks for Hardware Security (Invited Paper)

Graph neural networks (GNNs) have attracted increasing attention due to ...

0 Lilas Alrahis, et al. ∙

∙ 12/14/2021

MuxLink: Circumventing Learning-Resilient MUX-Locking Using Graph Neural Network-based Link Prediction

Logic locking has received considerable interest as a prominent techniqu...

0 Lilas Alrahis, et al. ∙

∙ 11/13/2021

UNTANGLE: Unlocking Routing and Logic Obfuscation Using Graph Neural Networks-based Link Prediction

Logic locking aims to prevent intellectual property (IP) piracy and unau...

0 Lilas Alrahis, et al. ∙

∙ 12/29/2020

UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking

Logic locking aims to protect the intellectual property (IP) of integrat...

0 Lilas Alrahis, et al. ∙

∙ 12/10/2020

GNNUnlock: Graph Neural Networks-based Oracle-less Unlocking Scheme for Provably Secure Logic Locking

In this paper, we propose GNNUnlock, the first-of-its-kind oracle-less m...

0 Lilas Alrahis, et al. ∙

∙ 09/04/2020

2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets

Dedicated, after acceptance and publication, in memory of the late Vasso...

0 Mohammed Nabeel, et al. ∙

∙ 07/08/2020

Power Side-Channel Attacks in Negative Capacitance Transistor (NCFET)

Side-channel attacks have empowered bypassing of cryptographic component...

0 Johann Knechtel, et al. ∙

∙ 08/11/2019

A Modern Approach to IP Protection and Trojan Prevention: Split Manufacturing for 3D ICs and Obfuscation of Vertical Interconnects

Split manufacturing (SM) and layout camouflaging (LC) are two promising ...

0 Satwik Patnaik, et al. ∙

∙ 06/06/2019

3D Integration: Another Dimension Toward Hardware Security

We review threats and selected schemes concerning hardware security at d...

0 Johann Knechtel, et al. ∙

∙ 06/05/2019

An Interposer-Based Root of Trust: Seize the Opportunity for Secure System-Level Integration of Untrusted Chiplets

Leveraging 2.5D interposer technology, we advocate the integration of un...

0 Mohammed Nabeel, et al. ∙

∙ 03/31/2019

Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime

Protecting intellectual property (IP) has become a serious challenge for...

0 Satwik Patnaik, et al. ∙

∙ 02/14/2019

Protect Your Chip Design Intellectual Property: An Overview

The increasing cost of integrated circuit (IC) fabrication has driven mo...

0 Johann Knechtel, et al. ∙

∙ 11/16/2018

Best of Both Worlds: Integration of Split Manufacturing and Camouflaging into a Security-Driven CAD Flow for 3D ICs

With the globalization of manufacturing and supply chains, ensuring the ...

0 Satwik Patnaik, et al. ∙

∙ 11/14/2018

Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices

Hardware-centric security threats have emerged in every stage of the IC ...

0 Nikhil Rangarajan, et al. ∙

∙ 06/24/2018

Raise Your Game for Split Manufacturing: Restoring the True Functionality Through BEOL

Split manufacturing (SM) seeks to protect against piracy of intellectual...

0 Satwik Patnaik, et al. ∙

∙ 06/03/2018

Advancing Hardware Security Using Polymorphic and Stochastic Spin-Hall Effect Devices

Protecting intellectual property (IP) in electronic circuits has become ...

0 Satwik Patnaik, et al. ∙

∙ 06/03/2018

Concerted Wire Lifting: Enabling Secure and Cost-Effective Split Manufacturing

Here we advance the protection of split manufacturing (SM)-based layouts...

0 Satwik Patnaik, et al. ∙

∙ 11/14/2017

Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging

Layout camouflaging (LC) is a promising technique to protect chip design...

0 Satwik Patnaik, et al. ∙